Service Manuals, User Guides, Schematic Diagrams or docs for : TOSHIBA Laptop Toshiba Satellite U400D (Quanta BU2) laptop schematics
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1 2 3 4 5 6 7 8
PCB STACK UP
LAYER 1 : TOP
BU2 SYSTEM DIAGRAM 01
LAYER 2 : SGND DDRII-SODIMM1 DDRII 667/800 MHz
AMD Lion CPU THERMAL
A LAYER 3 : IN1 PAGE 8 Sabie SENSOR A
Griffin 14.318MHz
LAYER 4 : SVCC S1G2 Processor PAGE 6
DDRII-SODIMM2 DDRII 667/800 MHz
638P (uPGA)/35W
LAYER 5 : IN2 CPU_CLK
PAGE 8 PAGE 4,5,6,7
LAYER 6 : IN3 NBGFX_CLK CLOCK GEN
NBGPP_CLK ICS9LPRS480AKLFT
LAYER 7 : SGND1 SBLINK_CLK SLG8SP628VTR
HT LINK
LAYER 8 : BOT RTM880N-795
PAGE 3
PCI-E HDMI/CEC
PAGE 18
X1 X1 X1 X1 NORTH BRIDGE
CRT
LAN Express Card Mini PCI-E Card Mini PCI-E Card RS780M
Marvell
PAGE 19
PCIE-LAN (NEW CARD) HD-DVD (Wireless LAN) 21mm X 21mm, 528pin BGA
B B
8040T/8072 (ROBSON/TV) LVDS
(10/100/GagaLAN)
PAGE 17
PAGE 24 PAGE 24 PAGE 23 PAGE 23
PAGE 9,10,11 LED Driver LED Panel
Mini PCI-E Card x1
RJ45/RJ11 Board
PAGE 17 PAGE 17 HD DVD DECODER x1
PCIE X4 SBSRC_CLK
PAGE 24 NAND FLASH CARD 4,8
IDE/133 USB2.0
PAGE 23 0,10,11 1 2 5 6 7
SATA0 150MB USB2.0 Ports Felice Webcam Fingerprint Bluetooth NEW CARD
SATA - HDD SOUTH BRIDGE
SYSTEM CHARGER(ISL88731) X4 PAGE 20,23 PAGE 25 X1 PAGE 17 PAGE 25 PAGE 25 PAGE 24
PAGE 20
PAGE 30 SB700 PAGE 19
SATA - CD-ROM
SATA1 150MB 21mm X 21mm, 528pin BGA
PCI BUS / 33MHz
SYSTEM POWER ISL6237IRZA-T PAGE 20 4.5W(Ext)
C C
PAGE 31 4.3W(Int)
E-SATA
SATA2 150MB Azalia
PAGE 12,13,14,15,16
CPU CORE ISL6265A
PAGE 20 PCMCIA O2 OZ129T
Controller
PAGE 32 CB1410
G-Sensor SMBUS PAGE22
MDC/FM TUNER PAGE21
LIS3L02AQ3 PAGE 19 LPC CONEXANT
VCCP +1.1V AND +1.2V(MAX8717) CX20561
CONNECTOR
PAGE 33
Keyboard PAGE 29 PAGE 27 PAGE 26 IEEE1394 Memory
CIR PAGE 28 WINBOND KBC PCMCIA CONN CardReader
DDR II SMDDR_VTERM WPC8763LDG PAGE 21 PAGE 22 PAGE 22
1.8V/1.8VSUS(TPS51116REGR) Touch Pad PAGE 25 MDC/FM TUNER HP Audio
PAGE 34 Kill SW PAGE 29 Module Amplifier Amplifier
G1412 G1441 PCI ROUTING
PAGE 28 PAGE 27 TABLE IDSEL INTERUPT DEVICE
DISCHARGE 1.5/1.25/1.2/1.1V
VR (AUDIO CONN)
PAGE 27 PAGE 26 REQ0# / GNT0# AD17 INTE# OZ129T
D PAGE 27 D
PAGE 35 REQ1# / GNT1# AD18 INTF# CB1410
FAN FLASH Digital MIC AUDIO CONN SPEAKER
SPI (HP/ MIC) Conn PROJECT : BU2
PAGE 6 PAGE 28 PAGE 16,26 PAGE 27 PAGE 26 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
BLOCK DIAGRAM
NB4
Date: Wednesday, January 30, 2008 Sheet 1 of 35
1 2 3 4 5 6 7 8
5 4 3 2 1
INDEX
PAGE# DESCRIPTION NOTE
AC IN
Power Sequence
02
1 SCHEMATIC BLOCK DIAGRAM
3V/5VPCU
2 SYSTEM INFORMATION
D D
3 CLOCK GENERATOR_SLG8SP628 NBSWON#
SB700 SM BUS
4 S1G2 HT I/F 1/4
DNBSWON#
5 S1G2 DDRII MEMORY I/F 2/4
SB700 SMBUS SMBUS Function Define
S5_ON/S5
6 S1G2 CTRL & DEBUG 3/4
SMBCLK0
DDR / DDR THER / CLOCK GEN (+3V)
7 S1G2 PWR & GND 4/4 RSMRST# SMBDAT0
SMBCLK1
8 DDR2 SODIMMS: A/B CHANNEL Mini Card/New Card (+3VS5)
SMBDAT1
PCIE_WAKE#
9 RS740/RS780-HT LINK/PCIE I/F 1/4 SMBCLK2
HDMI CEC (+3VS5)
SMBDAT2
10 RS740/RS780-SYSTEM I/F 3/5 SUSC
11 RS740/RS780-POWER5/5
SUSB
12 SB700-PCIE/PCI/CPU/LPC 1/4
C C
SUSON
13 SB700-ACPI/GPIO/USB 2/4
14 SB700-ACPI/GPIO/USB 2/4 MAINON KBC(EC) SM BUS
15 SB700-PWR/DECOUPLING 4/4
VR_ON
16 SB700-STRAPS & PWRGD KBC SMBUS SMBUS Function Define
CPU_CORE
17 LCD/LED PANEL/LID/CAMERA MBCLK
BATTERY (+3VPCU)
MBDAT
18 HDMI/HDMI-CEC(R5F211A) VRM_PWRGD
2ND_MBCLK
CPU THER / SENSOR/EC (+3V/PCU)
19 CRT & G-SENSOR(LIS3L02A) 2ND_MBDATA
1.2_ON
3ND_MBCLK
20 SATA HDD/ODD & ESATA/USB HDMI CEC / TOUCH SEN(+3VS5)
3ND_MBDATA
NB_CORE
21 PCMCIA(CB1410) -OPTION
22 OZ129T(5IN1/1394) HWPG
B B
23 MINI CARD & NAND FLASH CARD
ECPWROK
24 NEW CARD & RJ45 BOARD/BEEP
NB_PWRGD_IN
25 TP/FP/BT/PB/FELICA/MMB CONN
26 CONEXANT(CX205601)/SPK/AMP SB_PWRGD_IN
27 JACK/VR/FM/MIC/MDC/AMPLIFIER
CPU CLK IN
28 EC(KBC)-WPCPC8763/WPC8769
CPU RESET
29 KEYBOARD/LED/KILL SW/HOLE
30 CHARGER (ISL6251A) CPU POWER OK
31 SYSTEM 5V/3V (ISL6237)
CPU_LDTSTOP#
32 AMD GRIFFIN (ISL6265)
A A
33 +NB_CORE (RT8202)
34 DDR 1.8V(TPS51116)
35 DISCHARGE (1.25V/1.5V)
PROJECT : BU2
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
SYSTEM INFORMATION
NB4
Date: Thursday, November 08, 2007 Sheet 2 of 35
5 4 3 2 1
5 4 3 2 1
CLK_GEN_SLG8SP628 03
+3V +3V_CLK_VDD +1.2V +1.2V_CLK_VDDIO
L45 L46
BK1608HS600 BK1608HS600
C448 C238 C453 C232 C233 C472 C474 C241 C454 C473 C455 C463 C458 C452
D 22u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 22u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 D
ICS9LPRS480 P/N : Clock chip has internal serial terminations
for differencial pairs, external resistors are
SLG8SP628 P/N : AL8SP628000 reserved for debug purpose.
RTM880N-796 P/N : AL000880000
Place within 0.5"
of CLKGEN R369
U31
*261/F_4
4 50 CPUCLKP_R RP63 1 2 0_4P2R_4
+3V +3V_CLK_48 +3V_CLK_VDD VDDDOT CPUK8_0T CPU_CLKP (6,12)
16 49 CPUCLKN_R 3 4 To CPU
VDDSRC CPUK8_0C CPU_CLKN (6,12)
L49 26
VDDATIG
35
BK1608HS600 VDDSB_SRC NBGFX_CLKP_R RP66
40 30 1 2 0_4P2R_4 NBGFX_CLKP (10)
C461 VDDSATA ATIG0T NBGFX_CLKN_R To NB
48 29 3 4 NBGFX_CLKN (10)
VDDCPU ATIG0C
55 28
2.2u/6.3V_6 VDDHTT ATIG1T
56 27
VDDREF ATIG1C
63
VDD48
37 SBLINK_CLKP_R RP62 1 2 0_4P2R_4
C SB_SRC0T SB_REFCLKP (10) C
11 36 SBLINK_CLKN_R 3 4 To NB
+1.2V_CLK_VDDIO VDDSRC_IO0 SB_SRC0C SB_REFCLKN (10)
17 32 SBSRC_CLKP_R RP64 1 2 0_4P2R_4
VDDSRC_IO1 SB_SRC1T SBSRC_CLKP (12)
25 31 SBSRC_CLKN_R 3 4 To SB
VDDATIG_IO SB_SRC1C SBSRC_CLKN (12)
34
VDDSB_SRC_IO
47
VDDCPU_IO NBGPP_CLKP_R RP67 0_4P2R_4 NBGPP_CLKP
22 1 2 T101
SRC0T NBGPP_CLKN_R NBGPP_CLKN
21 3 4 T102
SRC0C CLK_PCIE_NEW_R RP68 NEW@0_4P2R_4
1 20 1 2 CLK_PCIE_NEW (12,24)
C460 GND48 SRC1T CLK_PCIE_NEW#_R To New Card
7 19 3 4 CLK_PCIE_NEW# (12,24)
CG_XIN GNDDOT SRC1C CLK_PCIE_MINI_R RP72 0_4P2R_4 CLK_PCIE_MINI
10 15 1 2
GNDSRC0 SRC2T CLK_PCIE_MINI#_R CLK_PCIE_MINI# To Mini PCIE Slot
18 14 3 4
2
33p/50V_4 GNDSRC1 SRC2C CLK_PCIE_MINI2_R RP71 0_4P2R_4
Y6
24
33
GNDATIG QFN64 SRC3T
13
12 CLK_PCIE_MINI2#_R
1
3
2
4
CLK_PCIE_MINI2 (12,23)
To Mini PCIE Slot
GNDSB_SRC SRC3C CLK_PCIE_MINI2# (12,23)
14.318MHZ 43 9 CLK_PCIE_LAN_R RP73 1 2 0_4P2R_4 CLK_PCIE_LAN
C462 GNDSATA SRC4T CLK_PCIE_LAN#_R CLK_PCIE_LAN# To LAN Controller
46 8 3 4
1
CG_XOUT GNDCPU SRC4C
52
GNDHTT NB CLOCK INPUT TABLE
60
33p/50V_4 GNDREF NB CLOCKS RX780 RS780
42 T40
SRC6T/SATAT
41 T42
CG_XIN SRC6C/SATAC HT_REFCLKP 100M DIFF 100M DIFF
61 6 T45
CG_XOUT X1 SRC7T/27M_SS
62 5 T44
X2 SRC7C/27M_NS
Rev:2A 12/07 Cahnge C460/C462 Load Capacitance For Matching Crystal.. HT_REFCLKN 100M DIFF 100M DIFF
2 54 NBHT_REFCLKP_R RP65 1 2 0_4P2R_4 REFCLK_P 14M SE (1.8V) 14M SE (1.1V)
(8,13) PCLK_SMB SMBCLK HTT0T/66M HT_REFCLKP (10)
3 53 NBHT_REFCLKN_R 3 4 To NB
(8,13) PDAT_SMB SMBDAT HTT0C/66M HT_REFCLKN (10)
REFCLK_N NC vref
CLK_PD# 51 64 CLK_48M_USB_R R385 33_4 To SB GFX_REFCLK 100M DIFF 100M DIFF(IN/OUT)*
PD# 48MHz_0 CLK_48M_USB (13)
GPP_REFCLK 100M DIFF NC or 100M DIFF OUTPUT
T43 23 59 SEL_HTT66
New Card CLKREQ# NEW_CLKREQ# CLKREQ0# REF0/SEL_HTT66 SEL_SATA GPPSB_REFCLK 100M DIFF 100M DIFF
(13,24) NEW_CLKREQ# 45 58
CLKREQ1# REF1/SEL_SATA SEL_27 R178 158/F_4 To NB
B
T41 44 57 EXT_NB_OSC (10)
B
C227 CLKREQ2# REF2/SEL_27 R374 90.9/F_4
T38 39
CLKREQ3#
T39 38
0.1u/10V_4 CLKREQ4#
TGND0
TGND1
TGND2
TGND3
TGND4
TGND5
TGND6
TGND7
TGND8
TGND9
R4004/R4005 (value may change)
NB_OSC
+3V_CLK_VDD SLG8SP628
65
66
67
68
69
70
71
72
73
74
RES CHIP 82.5 1/16W +-1%(0402) --> CS08252FB11
R368 8.2K_4 NEW_CLKREQ# RX780 1.8V 82.5R/130R RES CHIP 130 1/16W +-1%(0402)L-F --> CS11302FB15
R371 8.2K_4 CLK_PD#
RES CHIP 158 1/16W +-1%(0402) --> CS11582FB00
RS780 1.1V 158R/90.9R RES CHIP 90.9 1/16W +-1%(0402) --> CS09092FB15
+3V_CLK_VDD FOR EXTERMAL/INTERNAL CLOCK
R377 CLK_PCIE_MINI 4 3 RP70
PCIE_CLK_MINI (12,23)
8.2K_4 1 66 MHz 3.3V single ended HTT clock CLK_PCIE_MINI# 2 1 0_4P2R_4
PCIE_CLK_MINI# (12,23)
SEL_HTT66
SEL_SATA 0* 100 MHz differential HTT clock
SEL_HTT66 CLK_PCIE_LAN 2 1 RP45
PCIE_CLK_LAN (12,24)
SEL_27 1* 100 MHz non-spreading differential SRC clock CLK_PCIE_LAN# 4 3 0_4P2R_4
PCIE_CLK_LAN# (12,24)
SEL_SATA
0 100 MHz spreading differential SRC clock
R181 R380 R373
*8.2K_4 8.2K_4 8.2K_4 1 27MHz and 27M SS outputs
A
SEL_27
0* 100 MHz SRC clock
Place Close to Drivers Side A
* default
PROJECT : BU2
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CLOCK GENERATOR_SLG8SP628
NB4
Date: Thursday, July 24, 2008 Sheet 3 of 35
5 4 3 2 1
5 4 3 2 1
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