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A B C D E
1 1
NALAA
2
Hamburg 10 2
LA-6041P REV 1.0 Schematic
3
Intel Arrandale /IBEX PEAK 3
2009-10-01 Rev 1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NALAA LA-6041P M/B
Date: Tuesday, April 13, 2010 Sheet 1 of 48
A B C D E
A B C D E
Compal Confidential Fan Control Clock Generator
Intel Arrandale APL5607KI-TRG RTM890N-631-GRT
Model Name : NALAA page 6 page 13
File Name : LA-6041P
1 1
rPGA-989 Memory BUS(DDRIII) 200pin DDRIII-SO-DIMM X2
Dual Channel BANK 0, 1, 2, 3 page 11,12
page 5,6,7,8,9,10 1.5V DDRIII 800/1066 MT/s
USB/B BT conn
FDI X8 DMI X4 USB port 0,1 USB port 5
page 30 page 26
2.7GHz 2.5GHz
3IN1 RTS5138-GR Int. Camera
USB port 10 USB port 11
USB page 31 page 13
LCD Conn. 5V 480MHz
page 13
2 2
CRT PCIeMini Card
page 14 WiMax
USB
USB port 13
5V 480MHz page 27
HDMI Conn. HDMI Level Shifter PCIe 1x PCIeMini Card
page 15
1.5V 2.5GHz(250MB/s) WLAN
PCIe port 2
page 27
page 15 Intel Ibex Peak
SATA port 1 SATA HDD
5V 3GHz(300MB/s) page 25
RJ45 RTL8105E-GR 10/100M PCIe 1x SATA port 4 SATA ODD
page 28 PCIe port 1 page 28 1.5V 2.5GHz(250MB/s) BGA-951 5V 3GHz(300MB/s) page 25
3 3
SATA port 5
5V 3GHz(300MB/s)
eSATA USB
USB port 3 USB port 3
page 16~24 page 25 page 25
5V 480MHz
3.3V 33 MHz
LPC BUS
HD Audio 3.3V/1.5V 24MHz
Power/B RTC CKT. MDC 1.5 Conn HDA Codec
page 34 ALC259-GR
page 16 SPI ROM Debug Port ENE KB926 E0 page 26 page 29
page 16 page 33 page 32
USB/B DC/DC Interface CKT.
page 30
page 35
Int.
Touch Pad EC ROM MIC CONN MIC CONN HP CONN SPK CONN
4
ODD/B Int.KBD (LVDS CONN) page 30 page 30 page 30
4
page 26 page 26 page 33 page 13
page 25 Power Circuit DC/DC
page 36~44 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NALAA LA-6041P M/B
Date: Tuesday, April 13, 2010 Sheet 2 of 48
A B C D E
5 4 3 2 1
NALAA Hamburg Intel Arrandale (UMA)
B+
Ipeak=5A, Imax=3.5A, Iocp min=7.9 DESIGN CURRENT 5A +5VALW
D SUSP D
N-CHANNEL DESIGN CURRENT 4A +5VS
SI4800
TPS51125RGER
Ipeak=5A, Imax=3.5A, Iocp min=7.7 DESIGN CURRENT 5A +3VALW
WOL_EN#
P-CHANNEL DESIGN CURRENT 330mA +3V_LAN
AO-3413
SUSP
N-CHANNEL DESIGN CURRENT 4A +3VS
SI4800 VGA_ENVDD
P-CHANNEL DESIGN CURRENT 1.5A +LCD_VDD
C AO-3413 C
BT_PWR#
DESIGN CURRENT 180mA +BT_VCC
P-CHANNEL
AO-3413
VR_ON
Ipeak=48A, Imax=33.6A, Iocp min=57.28 DESIGN CURRENT 48A +CPU_CORE
ISL62883
GFXVR_EN
Ipeak=22A, Imax=15.4A, Iocp min=26 DESIGN CURRENT 22A +GFX_CORE
ADP3211AMNR
B
VTTP_EN# B
Ipeak=20A, Imax=14A, Iocp min=27.49 DESIGN CURRENT 20A +VTT
APW7138NITRL
+1.05VS
SYSON
Ipeak=9A, Imax=6.3A, Iocp min=9.8 DESIGN CURRENT 9A +1.5V +1.5V_CPU
RT8209BGQW SUSP
DESIGN CURRENT 1.2A +1.5VS
N-CHANNEL
SI4856 SUSP
DESIGN CURRENT 1.5A +0.75VS
G2992F1U
SUSP#
DESIGN CURRENT 1.5A +1.8VS
MP2121DQ
A A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Tree
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NALAA LA-6041P M/B
Date: Tuesday, April 13, 2010 Sheet 3 of 48
5 4 3 2 1
A B C D E
( O MEANS ON X MEANS OFF )
Voltage Rails BTO Option Table
+RTCVCC +B +5VALW +1.5V +5VS Function Bluetooth RJ11 LAN HDMI Card Reader Express Card Mini Card
+3VALW +3VS
description (B) (R) (E) (Y) (W)
+VSB +1.5VS
1 power 1
plane +VGA_CORE explain Bluetooth MDC LAN HDMI Card Reader New Card PCMCIA WIRELESS
+CPU_CORE
BTO BT@ MDC@ IHDMI@ CARD@ WLAN@
+VTT
+1.05VS
+1.8VS
+1.1VS
State +0.75VS
S0
O O O O O
SIGNAL
2 S1 STATE SLP_S3# SLP_S4# SLP_S5# 2
O O O O O
Full ON HIGH HIGH HIGH
S3
O O O O X S1(Power On Suspend) HIGH HIGH HIGH
S5 S4/AC
O O O X X S3 (Suspend to RAM) LOW HIGH HIGH
S5 S4/ Battery only S4 (Suspend to Disk) LOW LOW HIGH
O O X X X
S5 (Soft OFF) LOW LOW LOW
S5 S4/AC & Battery
don't exist
O X X X X G3 LOW LOW LOW
3 3
EC SM Bus1 address EC SM Bus2 address
Power Device Address Power Device Address
+3VALW EC KB926 D3 +3VS EC KB926 D3
+3VALW Smart Battery 0001 011x b +3VS VGA THM Sensor 1001 110x b
ADM1032ARMZ
+3VS PCH 0100 110x b
PCH SM Bus address
Power Device Address
+3VALW PCH
+3VS Clock Generator 1101 001x b
4 +3VS DDR DIMM0 1001 000x b 4
+3VS DDR DIMM1 1001 010x b
+3VS Express
+3VS WLAN/Wimax/3G
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NALAA LA-6041P M/B
Date: Tuesday, April 13, 2010 Sheet 4 of 48
A B C D E
5 4 3 2 1
JCPUB NPS@
1 2 H_COMP3 AT23 2 1
R1 20_0402_1% COMP3 R19 0_0402_5%
BCLK A16 CLK_CPU_BCLK 21
MISC
MISC
1 2 H_COMP2 AT24 B16 CLK_CPU_BCLK# 21
R2 20_0402_1% COMP2 BCLK#
H_COMP1 G16 CLK_CPU_XDP_R 1 CLK_CPU_XDP
CLOCKS
1 2 COMP1 BCLK_ITP AR30 2
S
D
R4 49.9_0402_1% AT30 CLK_CPU_XDP#_R 1 R41 @ 2 0_0402_5% CLK_CPU_XDP# SM_DRAMRST#_CPU 3 1
BCLK_ITP# SM_DRAMRST# 11,12
1 2 H_COMP0 AT26 R42 @ 0_0402_5%
COMP0
1
R3 49.9_0402_1% E16 CLK_PEG 17 Q41
PEG_CLK PS@ BSS138_NL_SOT23-3
G
D16 CLK_PEG# 17
2
TP_SKTOCC# PEG_CLK# R127 PS@
PAD T41 AH24 SKTOCC#
+VTT A18 Unused by Clarksfield rPGA989 100K_0402_5%
DPLL_REF_SSCLK RST_GATE 21
D A17 D
2
CATERR# DPLL_REF_SSCLK#
1 2 AK14 CATERR#
2
THERMAL
THERMAL
R18 49.9_0402_1% C314 PS@
0.047U_0402_16V7K Add on 11/09
+VTT For prevent noise issue F6 SM_DRAMRST#_CPU
1
SM_DRAMRST#
21 PECI AT15 PECI
SM_RCOMP[0] AL1 SM_RCOMP_0 R6 1 2 100_0402_1%
2 1 AM1 SM_RCOMP_1 R7 1 2 24.9_0402_1% DDR3 Compensation Signals
SM_RCOMP[1]
2
C225 100P_0402_50V8J AN1 SM_RCOMP_2 R8 1 2 130_0402_1%
Layout Note:Please these +VTT
R10 H_PROCHOT#_D SM_RCOMP[2] resistors near Processor
+VTT 1 2 AN26 PROCHOT#
68_0402_5% R9 68_0402_5% AN15 PM_EXTTS#0
DDR3
MISC
PM_EXT_TS#[0]
@ PM_EXT_TS#[1] AP15 PM_EXTTS#_R 2 1 PM_EXTTS# 11,12 PM_EXTTS#0 R15 2 1 10K_0402_5%
R12 0_0402_5%
1
AK15 PM_EXTTS#_R R13 2 1 10K_0402_5%
21 H_THERMTRIP# THERMTRIP#
H_CPURST#
AT28 XDP_PRDY#
PRDY# XDP_PREQ# XDP_TDI_R XDP_TDI
PREQ# AP27 1 2
R20 0_0402_5%
AN28 XDP_TCK
XDP_RST#_R H_CPURST# TCK XDP_TMS XDP_TDO_M XDP_TDO
1 2 AP26 RESET_OBS# TMS AP28 1 @ 2
PWR MANAGEMENT
PWR MANAGEMENT
R36 1K_0402_5% AT27 XDP_TRST# Routed as a single daisy chain R21 0_0402_5%
TRST#
1
JTAG & BPM
AL15 AT29 XDP_TDI_R R23
18 PMSYNCH PM_SYNC TDI
AR27 XDP_TDO_R 0_0402_5%
TDO XDP_TDI_M
TDI_M AR29 2 1 +3VS
2 1 H_PWRGOOD1_R AN14 AP29 XDP_TDO_M R312 1K_0402_5%
2
+1.5V_CPU 0_0402_5% R25 VCCPW RGOOD_1 TDO_M XDP_TDI_M 1 @ 2
AN25 R26 0_0402_5%
DBR# XDP_DBRESET# 18
C H_PWRGOOD AN27 C
21 H_PWRGOOD VCCPW RGOOD_0 XDP_TDO_R 1 2
2
AJ22 XDP_BPM#0 XDP_PRDY# 1 2 R27 0_0402_5%
R28 DRAMPWROK BPM#[0] XDP_BPM#1 @ C7 0.1U_0402_10V6K
18 DRAMPWROK AK13 SM_DRAMPW ROK BPM#[1] AK22
1.1K_0402_1% AK24 XDP_BPM#2 XDP_PREQ# 1 2
NPS@ BPM#[2] XDP_BPM#3 @ C8 0.1U_0402_10V6K
BPM#[3] AJ24
VTTPWROK_CPU AM15 AJ25 XDP_TCK 1 2
40 VTTPWROK_CPU
1
VTTPW RGOOD BPM#[4] @ C9 0.1U_0402_10V6K
BPM#[5] AH22
DRAMPWROK AK23 XDP_TMS 1 2 JTAG MAPPING
TAPPWRGD BPM#[6] @ C10 0.1U_0402_10V6K
AM26 TAPPW RGOOD BPM#[7] AH23
XDP_TRST# 1 2
2
@ C11 0.1U_0402_10V6K Scan Chain STUFF -> R20, R23, R27
R29 AL14 XDP_TDI_R 1 2 (Default) NO STUFF -> R21, R26
20 BUF_PLT_RST# RSTIN#
3K_0402_1% 1.5K_0402_1% R30 ◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo