Service Manuals, User Guides, Schematic Diagrams or docs for : acer Acer Aspire 3410_Inventec_acer_SJM31_6050A2264501_RevB_
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5 4 3 2 1
D D
C
ACER_SJM31 C
MAIN BOARD
2009.05.04
B B
A A
EE DATE POWER DATE
DRAWER
DESIGN
CHECK TITLE
INVENTEC
RESPONSIBLE
ACER_SJM31
SIZE= VER: SIZE CODE DOC.NUMBER REV
Monday, May 04, 2009 2009-ECO-006989 A FILE NAME: XXXX-XXXXXX-XX C CS D-CS-1310A22752-0-ALG B
DATE CHANGE NO. REV P/N XXXXXXXXXXXX SHEET 1 of 36
5 4 3 2 1
8 7 6 5 4 3 2 1
1. Schematic Page Description :
Montevina Schematic Ver : A02
1. Title 24. Clock Generator
D D
2. Schematic Page DESCR 25. DDR3 SDRAM SO-DIMM0
3. Block Diagram 26. DDR3 SDRAM SO-DIMM1
4. Annotations 27. ICH9M CPU/IDE/SATA(1/4)
5. Schematic Modify 28. ICH9M PCI/PCIE/DMI/USB(2/4)
6. Timing Diagram 29. ICH9M GPIO(3/4)
7. Power Block Diagram 30. ICH9M Power/GND(4/4)
8. Adaptor in/Charge 31. LCD CNN/SATA/3G/WLAN
9. 5VLA/5VA/3VA 32. KBC ITE8512F
10. 3VS/5VS/1.5V (DDR3) 33. IO CN 1/3
11. 1.05VS/1.5S/1.8V/1.5VA 34. IO CN 2/3
12. Power Latch/1.5VS/SCREW HOLE 35. IO CN 3/3
13. CPU Core Power 36. Audio Codec
C
14. GPU Core Power C
15. Penryn Processor(1/2)
16. Penryn Processor(2/2)
17. CPU Thermal
18. Cantiga Host(1/6)
19. Cantiga DMI/Graph(2/6)
20. Cantiga DDRII(3/6)
21. Cantiga Power(4/6)
22. Cantiga Power(5/6)
23. Cantiga Ground(6/6)
B B
A A
TITLE
INVENTEC
SJM31(Penryn+Cantiga+ICH9M)SFF
Schematic Page
SIZE CODE DOC.NUMBER REV
Custom CS D-CS-1310A22752-0-ALG A
CHANGE by Miiles Liu DATE Monday, May 04, 2009 SHEET 2 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
3. Block Diagram :
PLL
CPU 22mmx22mm
RTM875T-606-VD-GRT
CPU Thermal Penryn - SFF
FAN Thermal TSSOP 64P
P.24
D EMC1402 Penryn 956Pin D
P.17 Palmrest
P.17 P.15, 16 266MHz+/- x2 (CPU, NB)
100MHz+/- x7
FSB 1.05V 48MHz x2 (ICH, SC)
667/800/1066MHz 33MHz x6
LCD LVDS DDR3 1.5V 14MHz x2 (ICH, SIO)
800/1066MHz
SODIMM0
SODIMM1
P.31 MCH 27mmx25mm
27MHz/96MHz+/-x1
VGA RGB FCBGA 1363pin
CRT DDR3 1.5V
Board Cantiga - SFF 800/1066MHz
P.18-23 P.26
P.25
DMI x4
16mmx16mm MiniCard #1
PCI-Express x1 2.5GHz-----Port 1
SATA HDD ICH WLAN
SATA 150
Port#1 P.31 MiniCard #2
PCI-Express x1 2.5GHz-----Port 2
C
P.31 3G C
ICH9M-SFF Port#2 P.31
PCI-Express x1 2.5GHz-----Port 6
SSD HDD SSD SATA 150 FCBGA 569pin PCI-Express x1 2.5GHz-----Port 4
Board
PCI-Express x1 2.5GHz-----Port 5
USB0 USB1 USB2
PCI-Express x1 2.5GHz-----Port 3
Port Port Port USB Board GbE AR8131
RJ45
Only for BAP EASY Board GbE RTL8111CP
Audio Only for BAP
HDA 24MHz Codec
USB3 ALC269X-GR
EASY USB Audio HUBX4 EASY P.36
Board Board Board Board
IntMic
Only for BAP JM31, SJM31 IN Out
Digital Mic SPK
EHCI#1 Audio
Support
B S0~S3 state Board Out B
USB 2.0/1.1 IN Analog Out
Analog In
LPC 3.3V 33MHz
USB4 USB7 USB6 USB5 FP
WLAN Camera BlueTooth Finger Printer PMU&KBC 80Port TPM
Board ITE8502F
P.31 P.33 P.33
P.32 P.31 Board
Only for BAP Only for BAP
TPM
CR USB11
3G KB
Board P.34 EASY PORT
P.31
SPI
P.27-30
Flash DVI-D HUB USBX4 HP-OUT/MIC-IN RJ45 AC JACK
LINE-IN/SPDIF
ROM
A
USB8 P.32 A
REALTEK TMDS (Cantiga 19V
RTS5159
USB Port3 (ICH8M) GIGA LAN (AR8131)
GP/FP Glide Pad
JM31, SJM31 Analog Out (ALC269X)
P.32
Board
TITLE
INVENTEC
SJM31(Penryn+Cantiga+ICH9M)SFF
Block Diagram
SIZE CODE DOC.NUMBER REV
Custom CS D-CS-1310A22752-0-ALG B
CHANGE by Miiles Liu DATE Monday, May 04, 2009 SHEET 3 of 36
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
4. Net name Description : Power Rail
VCC_CORE
Destination
Penryn SFF HFM:
LFM:
Voltage
1.3319V~1.4375V~1.4591V
0.9221V~0.9625V~0.9739V
S0 Current
18A
1.05VS Penryn SFF : AGTL+ termination 1V~1.05V~1.10V 4.5A
Cantiga GS: Core 0.997V~1.05V~1.102V 8.7A
Voltage Rails Cantiga GS: PCIE 0.9975V~1.05V~1.1025V 1.78A
Cantiga GS:Core+IMEL+HSIO 0.9975V~1.05V~1.1025V 2.898A
DCIN Primary DC system power supply Cantiga GS:VCC_GMCH 0.997V~1.05V~1.102V 10.154A
+5VLA 5.0V always on power rail by LATCH or ACIN Cantiga GS:VCCA_SM_CK and NCTF 0.997V~1.05V~1.102V 37.95mA
D
+5VA 5.0V always on power rail by ECPWON Cantiga GS:VCC_DMI 0.997V~1.05V~1.102V 456mA
D
+3VA 3.3V always on power rail by ECPWON Cantiga GS:VCCA_SM 0.997V~1.05V~1.102V 747.5mA
+5VS 5.0V switched power rail by SLP_S3#_3R Cantiga GS:VTT 0.997V~1.05V~1.102V 852mA
+3VS 3.3V switched power rail by SLP_S3#_3R ICH9M:VCC1_05 0.997V~1.05V~1.102V 1.634A
+1.8VS 1.8V switched power rail by SLP_S3#_3R ICH9M:DMI 0.997V~1.05V~1.102V 48mA
ICH9M:CPU_IO 0.997V~1.05V~1.102V 2mA
VCC_CORE Core Voltage for CPU 1.5VS Penryn SFF PLL 1.425V~1.5V~1.575V 130mA
+1.05VS 1.05V power rail for AGTL+ termination/Core for GMCH by SLP_S3#_3R Cantiga GS: QDAC 1.425V~1.5V~1.575V 0.5mA
+1.25VS 1.25V switched power rail by SLP_S3#_3R Cantiga GS: LVDS 1.71V~1.8V~1.89V 60.31mA
+1.5VS 1.5V power rail for CPU PLL/DMI;PCIE;DDRIII DLLs for GMCH/Core;PCIE Cantiga GS: TVDAC 1.425V~1.5V~1.575V 35mA
for ICH9m by SLP_S3#_3R Cantiga GS: Various PLLS analog supply 1.425V~1.5V~1.575V 485mA
Cantiga GS: VCC_SM_CK 1.425V~1.5V~1.575V 149.5mA
+1.5V 1.5V power rail for DDRII by SLP_S5#_3R Cantiga GS: VCC_SM 1.425V~1.5V~1.575V 3.1625A
0.75VDDT_DDRIII 0.75V DDRII Termination Voltage by SLP_S3#_3R ICH9M:PCIE_ICH 1.425V~1.5V~1.575V 646mA
ICH9M:SATA_ICH 1.425V~1.5V~1.575V 1.342A
ICH9M:VCC_GLAN 1.425V~1.5V~1.575V 80mA
Part Naming Conventions Mini Card:
C = Capacitor Express Card: 1.425V~1.5V~1.575V 650mA
C
CN = Connector 1.5V Cantiga GS: DDRIII System Memory 1.425V~1.5V~1.575V 3.1A(800M) 4.1A(1067M)
C
D = Diode 0.75VDDT_DDRIII:DDRIII Terminator: 0.7125V~0.75V~0.7875V 1.0A
F = Fuse 3VS Cantiga GS: HV CMOS 3.135V~3.3V~3.465V 105.3mA
L = Inductor Cantiga GS: VCCS_TVDAC 3.135V~3.3V~3.465V 78mA
Q = Transistor ICH9M:VCC3_3 3.135V~3.3V~3.465V 308mA
R = Resistor ICH9M:VCCGLAN3_3 3.135V~3.3V~3.465V 1mA
RP = Resistor Pack Thermal Sensor: 3.0V~3.3V~3.6V 5mA
U = Arbitrary Logic Device Mini Card: UMTS
Y = Crystal and Osc Express Card: 3.135V~3.3V~3.465V 1.3A
CLK Generator: ICS9LPRS365BKLFT 3.135V~3.3V~3.465V 500mA
Mini Card: WirelessLan
Net Name Suffix Bluetooth:
3.0V~3.3V~3.6V
Super I/O: IT8305E
# = Active Low signal Azalia Codec: ALC262
Azalia MDC:
5. Board Stack up Description 1.8VS
3VA
DVI
ICH9M: RTC
3.0V~3.3V~3.6V
2V~3.3V~3.465V
120mA
6uA
B
PCB Layers ICH9M:VCCSUS3_3
ICH9M:VCCCL3_3
3.135V~3.3V~3.465V
3.135V~3.3V~3.465V
212mA
73mA B
Layer 1 Component Side, Microstrip signal Layer ICH9M:VCCLAN3_3 3.135V~3.3V~3.465V 78mA
LCD: 3.0V~3.3V~3.6V 2A
Layer 2 Ground Plane Lan:AR8131 3.0V~3.3V~3.6V 1A
Layer 3 Stripline Layer Azalia MDC:
Flash ROM: BIOS 3.0V~3.3V~3.6V
Layer 4 Power Plane
Layer 5 Stripline Layer 5VS Cardreader: RTS5159 3.0V~3.3V~3.6V
Azalia Codec: ALC269 3.0V~3.3V~3.6V
Layer 6 Stripline Layer HDD: SATA 4.75V~5.0V~5.25V Max: 1.5A ; R/W: 460mA ; STDBY: 70mA
Layer 7 Ground Plane ODD: SATA 4.75V~5.0V~5.25V Max: 1.5A ; R/W: 900mA ; STDBY: 45mA
Audio AMP: G1432
Layer 8 Solder Side,Microstrip signal Layer Inverter:
WebCam 4.75V~5.0V~5.25V 1A
5VA USB: x 2 ports 5VA 2A
USB 5VA 1.5A
Differential Impedance for Microstrip Differential Impedance for Stripline
Host Clock 95 ohm +/- 20% 95 ohm +/- 20% 5VLA Control Power
PCI-E Clock 95 ohm +/- 20% 95 ohm +/- 20%
DDR3 CLK 75 ohm +/- 20% 75 ohm +/- 20% 3VLA EC: ITE8512E 3.0V~3.3V~3.6V 300mA
A DDR3 Strobe 90 ohm +/- 20% 90 ohm +/- 20% A
DMI Bus 95 ohm +/- 20% 95 ohm +/- 20%
PCIE Bus 95 ohm +/- 20% 95 ohm +/- 20%
SDVO 95 ohm +/- 20% 95 ohm +/- 20%
SATA 95 ohm +/- 20% 95 ohm +/- 20%
USB
LVDS
90 ohm +/- 20%
95 ohm +/- 20%
90 ohm +/- 20%
95 ohm +/- 20% TITLE
INVENTEC
Lan 95 ohm +/- 20% 95 ohm +/- 20% SJM31(Penryn+Cantiga+ICH9M)SFF
ANNOTATIONS
SIZE CODE DOC.NUMBER REV
Custom CS D-CS-1310A22752-0-ALG B
CHANGE by Miiles Liu DATE Monday, May 04, 2009 SHEET 4 of 36
8 7 6 5 4 3 2 1
5 4 3 2 1
6.Schematic modify Item and History :
2009.0108
1. ADD USB P3 for Docking, USB P5 for Finger
printer,
D D
Modify CN5 -----P28
2. Modify CN20 to 50pin-------P33
3. Move PWR_SWIN# from CN14 to CN20
4. ADD TPM module------P34
2009.0109
1. ADD DOCK_USB_EN, DOCK_CRT_IN#-----P32,33
2009.0112
1. Change power item: R490,R291,BAT CNN TH PIN
AX1 to A01 change list
1. Change AD_ON circiut for Green adaptor PC. (Page 12)
2. Change thermal shut down control by PM_ICH_PWROK from
ALL_SYSPWRGD. (Page 17)
C C
3. Add PCIE I/F to 3G mini card connector for support
EM772 (Page24, Page28, Page31)
A01 to A02 change list (JM31 A02, SJM31 A01)
1. Add EC_3VLA soft start circuit --- Change R480 to NU,
Add Q28, R378,R738,C374,R299,Q118,R739,C376 (Page 9)
2. Add 3VA porotect diode --- Add D35 (Page 9)
3. For green adaptor --- Change C419 from 0.1uf to 4.7uF
, Add Q120, R744,R742,R743 (Page 8, 12)
4. For power consumption --- Change Q37,Q50,Q51 from
6015B0090401 to 6015B0082201, Change Q54,Q38,Q48 from
6015B0086301 to 6015B0089301.(Page 8, 10, 11)
B B
5. Change R29,R30,R31,R32,R33,R34,R35 from 0 Ohm to short
pad.(Page 13)
6. For safty ---- Change R231 from 0 Ohm to 330 Ohm, R226
from 665 Ohm to 330 Ohm. (Page 27)
7.For 3G leakage ---- Delete R220,R211 (Page 29)
8. Delete reverse HW timing circuit. ---- Delete
U7,D13,R237,C376,U9,U8,D9,R222,C327 (Page 29, 32)
A02 for SJM31 change list
1. R513 change to 470 for SJM31 TP lock LED
A A
TITLE
INVENTEC
SJM31(Penryn+Cantiga+ICH9M)SFF
Schematic Modify
SIZE CODE DOC.NUMBER REV
Custom CS D-CS-1310A22752-0-ALG B
CHANGE by Miiles Liu DATE Monday, May 04, 2009 SHEET 5 of 36
5 4 3 2 1
5 4 3 2 1
SYSTEM POWER ON/OFF SEQUENCE Drawing : Wendy, Huang
Power on/off sequence AC insert (without Battery Pack) Power on/off sequence Battery insert Power on/off sequence AC insert(with charge over 95%)
Power on sequence Power off sequence (without AC adapter) Power on sequence Power off sequence
Power on sequence Power off sequence
Always 3.3V Always 3.3V
Always 3.3V
SW OFF: RTCVCC(3.3V) SW OFF: RTCVCC(3.3V)
D SW OFF: RTCVCC(3.3V) High High D
High
5VLA,3VLA 5VLA,3VLA
5VLA,3VLA High High
High
EC_3VLA EC_3VLA
EC_3VLA High
Wake-Up EC For Battery Charge
Low ACIN#(I) ACIN#(I)
ACIN#(I) EC Programming This Pin To High
High
EC Latch EC_AD_ON When Press Power Switch
EC_AD_ON(O) EC_AD_ON(O)
EC_AD_ON(O)
SW ON: PWR_SWIN#(I) SW ON: PWR_SWIN#(I) SW ON: PWR_SWIN#(I)
LATCH_ON(O) LATCH_ON(O) LATCH_ON(O)
3VA,5VA 3VA,5VA 3VA,5VA
RSMRST#(O) RSMRST#(O) RSMRST#(O)
PWR_BTN#(O) PWR_BTN#(O) PWR_BTN#(O)
SUSB#(I) SUSB#(I) SUSB#(I)
SUSC#(I) SUSC#(I) SUSC#(I)
1.5V_DDR 1.5V_DDR 1.5V_DDR
C C
MAIN POWER MAIN POWER MAIN POWER
1.5V_PWRGD(I) 1.5V_PWRGD(I) 1.5V_PWRGD(I)
1.05VS_PWRGD(I) 1.05VS_PWRGD(I) 1.05VS_PWRGD(I)
ALL_SYSPWRGD(O) ALL_SYSPWRGD(O) ALL_SYSPWRGD(O)
VR_ON(O) VR_ON(O) VR_ON(O)
VCORE_GD(I) VCORE_GD(I) VCORE_GD(I)
PM_ICH_PWROK(O) PM_ICH_PWROK(O) PM_ICH_PWROK(O)
Power on/off sequence AC insert(without charge over 95%) Suspend And Resume Sequence (S3) Power on/off sequence after windows shoutdown (WOL enable)
Suspend sequence Resume sequence Suspend sequence Resume sequence
Power on sequence Power off sequence Always 3.3V
Always 3.3V
SW OFF: RTCVCC(3.3V) High
Always 3.3V SW OFF: RTCVCC(3.3V)
High 5VLA,3VLA High
SW OFF: RTCVCC(3.3V)
High 5VLA,3VLA EC_3VLA
High Low
5VLA,3VLA ACIN#(I)
B High EC_3VLA B
Don't Care This Signal EC Keep EC_AD_ON Signal To High When WOL Enable
EC_3VLA EC_AD_ON(O)
ACIN#(I)
System Boot
ACIN#(I) High SW ON: PWR_SWIN#(I)
Full Battery High
System Boot EC Latch This Signal Capacity About EC_AD_ON(O)
95%~100% LATCH_ON(O)
EC_AD_ON(O) EC Keep LATCH_ON Signal To High When WOL Enable
3VA,5VA
SW ON: PWR_SWIN#(I) High
SW ON: PWR_SWIN#(I) High RSMRST#(O)
LATCH_ON(O) PWR_BTN#(O)
LATCH_ON(O) High
3VA,5VA SUSB#(I)
3VA,5VA High
RSMRST#(O) SUSC#(I)
RSMRST#(O)
PWR_BTN#(O) 1.5V_DDR
PWR_BTN#(O)
SUSB#(I) MAIN POWER
SUSB#(I) High
SUSC#(I) 1.5V_PWRGD(I)
SUSC#(I) High
1.5V_DDR 1.05VS_PWRGD(I)
1.5V_DDR
MAIN POWER
MAIN POWER ALL_SYSPWRGD(O)
1.5V_PWRGD(I)
A 1.5V_PWRGD(I) VR_ON(O) A
1.05VS_PWRGD(I)
1.05VS_PWRGD(I) VCORE_GD(I)
ALL_SYSPWRGD(O)
ALL_SYSPWRGD(O) PM_ICH_PWROK(O)
VR_ON(O)
VR_ON(O)
VCORE_GD(I)
VCORE_GD(I)
TITLE
INVENTEC
PM_ICH_PWROK(O) SJM31(Penryn+Cantiga+ICH9M)SFF
PM_ICH_PWROK(O) Time Diagram
SIZE CODE DOC.NUMBER REV
Custom CS D-CS-1310A22752-0-ALG B
CHANGE by Miiles Liu DATE Monday, May 04, 2009 SHEET 6 of 36
5 4 3 2 1
8 7 6 5 4 3 2 1
Power Block Diagram :
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