Service Manuals, User Guides, Schematic Diagrams or docs for : acer Acer TravelMate 3300_Wistron Myna II_RevSB
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A B C D E
Myna II Project code: 91.4C201.001
PCB REVISION: 05216-SB
Mobile CPU SYSTEM DC/DC
TPS5130 41,42
CLK GEN. Dothan G792
4
IDT CV125 CLE-1.5G / Dothan2.13G INPUTS OUTPUTS
4
19
3 (CPU on board,no socket ) 5V_S5
4, 5
3V_S5
DCBATOUT
1D5V_S0
HOST BUS 533MHz TV 2D5V_S0(LDO)
(EZ4 only )
DDR II 400/533MHz LVDS SYSTEM DC/DC
13
400/533 MHz LCD ISL6227 43
11,12 Alviso-GM RGB CRT INPUTS OUTPUTS
KI.91501.017 CRT
DDR II 400/533MHz
CH7307C
14 DCBATOUT
1D05V_S0
1D8V_S3
6,7,8,9,10
400/533 MHz
11,12
53 TMDS DVI-D
(EZ4 only ) 35 TPS51100DGQ 43
DMI I/F 100MHz
3 1D8V_S3 VTT_S0(0.9V) 3
Int. MIC PCMCIA I/F PCMCIA
Mic In TI SLOT MAXIM CHARGER
PCI 7411 PWR SW Support MAX8725ETI 44
Codec ACLINK TSP2220A TypeII
PCI BUS 1* Slot Cardbus 26 INPUTS OUTPUTS
Line In ALC655 1* 1394 26
CardReader 1394 6pin CHG_PWR
Conn 27 16.8V 3.2A
DCBATOUT
MS/MS Pro/
24,25 UP+5V
ICH6-M xD/ MMC/SD
5 in 1
26
5V 100mA
Line Out Ver. : B2, KI.80101.011
OP AMP CPU DC/DC
G1421B Mini-PCI
802.11A/B/G ISL6218CV-T 40
(only smaller)30
INPUTS OUTPUTS
2
INT.SPKR LAN 22, 23
2
TXFM RJ45 CONN VCC_CORE
Giga 23 23 DCBATOUT
0.844~1.3V
BCM5788-M
MODEM 27A
MDC Card LPC BUS
RJ11 CONN
15,16,17,18
NS KBC BIOS ROM LPC
PATA
(co-lay with PCMCIA)
IO Board 4M BITS DEBUG
PCI-E SIO Renesas RE144B PM49F004T-33VC
New card 87392 CONN.
29 two USB port
on IO Board
USB 31 30 33 33
3 PORT
21
21 FIR Touch INT.
PWR SW
1
TPS223129
HDD 20 MINI USB Pad 32 KB 32
1
Blue-tooth Wistron Corporation
IO Board 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Easy Port 4 (124 PIN) BLOCK DIAGRAM
Size Document Number Rev
AC RJ45-11 SEARIAL PRINTER PS2 MIC LINE IN LINE TV DVI PCIeX2 SMBUS Custom
Myna II SB
IN PORT CRT OUT OUT 34, 35 Date: Monday, September 26, 2005 Sheet 1 of 47
A B C D E
A B C D E
Alviso Strapping Signals ICH6-M Integrated Pull-up
and Configuration page 7 and Pull-down Resistors ICH6-M EDS 14308 0.8V1
Pin Name Strap Description Configuration
ACZ_BIT_CLK, DPRSLP#, EE_DIN,
CFG[2:0] FSB Frequency Select 000 = Reserved
001 = FSB533 EE_DOUT, GNT[5]#/GPO[17],
010 = FSB800 ICH6 internal 20K pull-ups
011-111 = Reversed GNT[6]#/GPO[16], LDRQ[1]/GPI[41],
4 CFG[3:4] Reversed LAD[3:0]#/FB[3:0]#, LDRQ[0],
4
CFG5 DMI x2 Select 0 = DMI x2 PME#, PWRBTN#, TP[3]
1 = DMI x4 (Default)
0 = DDR II
CFG6 DDR I / DDR II 1 = DDR I LAN_RXD[2:0] ICH6 internal 10K pull-ups
CFG7 CPU Strap 0 = Prescott
1 = Dothan (Default) ACZ_RST#, ACZ_SDIN[2:0], ACZ_SYNC, ICH6 internal 20K pull-downs
CFG[8:11] Reversed ACZ_SDOUT,ACZ_BITCLK, DPRSLPVR,
CFG[12:13] XOR/ALL Z test 00 = Reserved SPKR, EE_CS,
straps 01 = XOR mode enabled
10 = All Z mode enabled
11 = Normal Operation USB[7:0][P,N] ICH6 internal 15K pull-downs
(Default)
CFG[14:15] Reversed DD[7], SDDREQ ICH6 internal 11.5K pull-downs
CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled LAN_CLK ICH6 internal 100K pull-downs
(Default)
CFG17 Reversed
PCI Routing
CFG18 CPU core VCC
Select
0 = 1.05V (Default)
1 = 1.5V
IDSEL IRQ REQ/GNT ICH6-M IDE Integrated Series
3 CFG19 CPU VTT Select 0 = 1.05V (Default) Termination Resistors 3
1 = 1.2V
7411 25 B.F.G 0
CFG20 Reversed MiniPCI 21 E 1 DD[15:0], DIOW#, DIOR#, DREQ,
approximately 33 ohm
SDVOCRTL SDVO Present 0 = No SDVO device present DDACK#, IORDY, DA[2:0], DCS1#,
_DATA (Default) LAN 23 E 2
1= SDVO device present DCS3#, IDEIRQ
NOTE: All strap signals are sampled with respect to the leading
edge of the Alviso GMCH PWORK In signal.
1.CHECK P5[1D5V & 1D5V-AVDD]
2.CHECK P8[PM & GM]
RESISTOR CAPACITOR
Symbol name Value Tolerance Rating Size Symbol name Value Tolerance Rating Size
0402=> 1/16W, 25V 2=>0402, 3=>0603, 5=>0805, (M: +/-20, K: +/-10, Z: +80/-20) 2=>0402, 3=>0603, 5=>0805,
(J: 5%, F: 1%, D: 0.5%, B: 0.1 %) 0603 => 1/16W, 75V 6=>1206, 0=>1210 6=>1206, 0=>1210
0805 => 1/10W, 100V
SCD1U10V2MX-1 0.1uF M/X5R 10V 0402
10KR3 10K Ohm If no letter, it means J: 5% 1/16W, 75V 0603
2 2
SC10U6D3V5MX 10uF M/X5R 6.3V 0805
33D3R5 33.3 Ohm If no letter, it means J: 5% 1/10W, 100V 0805
SC2D2U16V5ZY 2.2uF Z/Y5V 16V 0805
1KR3F 1K Ohm F: 1% 1/16W, 75V 0603
The naming rule is
The naming rule is value + R + size + tolerance Capacitor type + value + rating + size + tolerance + material
For the value, it can be read by the number before R. (R means resistor) SCD1U10V2MX-1
For the tolerance, it can be read from the last letter. SC=> SMT Ceremic, TC=> POS cap or SP cap
For the rating, we don't show on the symbol name. D1U => 0.1uF
For the size, R2=>0402, R3=>0603, R5=>0805,.... 10V => the voltage rating is 10V
2=> 0402, 3=>0603, 5=>0805
M=>tolerance M, K, Z
X=> X7R/X5R, Y=> Y5V
-1 => symbol version, nonsense to EE characteristic
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
WISTRON
Size Document Number Rev
A3
Myna2 SB
Date: Monday, September 26, 2005 Sheet 2 of 47
3D3V_S0 0R0603-PAD 3D3V_S0 3D3V_S0 0R0603-PAD
R392
1 R386 2 3D3V_APWR_S0 1 2 3D3V_48MPWR_S0 1 R412 2 3D3V_CLKGEN_S0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
C496 C493 C490 C4994D7R3J-3-GP C507 C522 C512 C515 C492 C491 C272 C489 C523 C513 C509
SCD1U16V SC4D7U10V5ZY SCD1U16V SCD1U16V SC4D7U10V5ZY SCD1U16V SCD1U16V SC10U6D3V5MX SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
DY DY DY DY
?cost DREFSSCLK1 RN63 2 3 SRN33-2-U2 DREFSSCLK 7
DREFSSCLK#1 1 4 DREFSSCLK# 7
CLK_PCIE_DOCK_1 RN62 2 3 SRN33-2-U2 CLK_PCIE_DOCK1 34
CLK_PCIE_DOCK_1# 1 4 CLK_PCIE_DOCK1# 34
CLK_PCIE_DOCK_2 RN61 2
Dummy when no EZ4
3 SRN33-2-U2
CLK_PCIE_DOCK_2# 1
EZ4 4 CLK_PCIE_DOCK2 34
PCLK_PCM & PCLK_SIO CLK_PCIE_DOCK2# 34
need equal length EZ4
R427 1 2 22R2 PCLK_SIO_1 U41
31 PCLK_SIO
R373 1 2 33R2 PCLK_MINI_1 56 17
29 PCLK_MINI R428 33R2 PCLK_LAN_1 PCI0 LVDS RN60
22 PCLK_LAN 1 2 3 PCI1 LVDS# 18 2 3 SRN33-2-U2 CLK_PCIE_NEW 29
R426 1 2 10R2 4 1 NEW 4 CLK_PCIE_NEW# 29
3D3V_S0 24 PCLK_PCM R425 33R2 PCLK_KBC_1 PCI2
30 PCLK_KBC -1 1 2
H/L: 100/96MHz
5 PCI3 SRC1 19
20 RN57 1
Dummy when no new Card
4 SRN33-2-U2
SRC1# CLK_PCIE_ICH 16
R158 1 2 33R2 SS_SEL 9 22 2 3 CLK_PCIE_ICH# 16
33 PCLK_FWH R163 PCIF1/SEL100/96# SRC2
16 CLK_ICHPCI 1 2 33R2 ITP_EN 8 PCIF0/ITP_EN SRC2# 23
1
H/L : CPU_ITP/SRC7 24 RN58 1 4 SRN33-2-U2 CLK_MCH_3GPLL 7
R424 SRC3
16 PM_STPPCI# 55 PCI_STOP# SRC3# 25 2 3 CLK_MCH_3GPLL# 7
10KR2 26 CLK_PCIE_NEW1
SRC4 CLK_PCIE_NEW#1
SRC4# 27
46 31 CLK_PCIE_ICH1
2
11,18 SMBC_ICH SCL SRC5 CLK_PCIE_ICH#1
11,18 SMBD_ICH 47 SDA SRC5# 30
33 CLK_MCH_3GPLL1
VTT_PWRGD# 39 SRC6
32 CLK_MCH_3GPLL#1
DREFCLK_1 14 SRC6#
7 DREFCLK 3 2 DOT96
4 1 DREFCLK#_1 15 36 CLK_XDP_CPU1 RN59 1 4 SRN33-2-U2 CLK_XDP_CPU 4
7 DREFCLK# DOT96# CPU2_ITP/SRC7 CLK_XDP_CPU#1
CPU2_ITP#/SRC7# 35 2 3 CLK_XDP_CPU# 4
RN64 SRN33-2-U2
C508 XTAL_IN 50 44 CLK_CPU_BCLK1 RN56 1 4 SRN33-2-U2 CLK_CPU_BCLK 4
XTAL_OUT XTAL_IN CPU0 CLK_CPU_BCLK#1
1 2 49 XTAL_OUT CPU0# 43 2 3 CLK_CPU_BCLK# 4
3
D 41 CLK_MCH_BCLK1
CPU1
2
1 Q27 R369 1 2 22R2 40 CLK_MCH_BCLK#1 RN55 1 4 SRN33-2-U2 CLK_MCH_BCLK 6
38,39 1907_PGOOD 16 CLK_ICH14 CPU1#
G 2N7002 SC33P X3 31 CLK14_SIO R370 1 2 22R2 CLK_ICH14_1 52 2 3 CLK_MCH_BCLK# 6
R136 1 REF
S 2 475R2F CLK14_SIO_1 39 54 PM_STPCPU# 16,39
2
X-14D31818M-1 IREF CPU_STOP# CPU_SEL0
C497 53
1
FSC/TEST_SEL CPU_SEL1
1 2 SB_0817 VTT_PWRGD# 10
FSB/TEST_MODE 16
12 FS_A R157 2 1 22R2
VTT_PWRGD#/PD USB48/FSA R156 2 CLK48_ICH 16
1 22R2 CLK48_CARDBUS 24
SC33P CLK_ICH14 & CLK14_SIO
2 34 3D3V_CLKGEN_S0
need equal length 6
VSS_PCI VDD_SRC
21
VSS_PCI VDD_SRC
51 VSS_REF VDD_PCI 7
3D3V_S0 45 1
VSS_CPU VDD_PCI
38 VSSA
13 VSS48 VDD_REF 48
29 VSS_SRC VDD_CPU 42
1
1
IN EN OUT 37 3D3V_APWR_S0
R161 R160 VDDA 3D3V_48MPWR_S0
(3D3V_S0) (1907_PGOOD) (VTT_PWRGD#) VDD48 11
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