Service Manuals, User Guides, Schematic Diagrams or docs for : acer Acer TravelMate 7740_7740Z_Quanta_ZYD_Rev3B
<< Back | HomeMost service manuals and schematics are PDF files, so You will need Adobre Acrobat Reader to view : Acrobat Download Some of the files are DjVu format. Readers and resources available here : DjVu Resources
For the compressed files, most common are zip and rar. Please, extract files with Your favorite compression software ( WinZip, WinRAR ... ) before viewing. If a document has multiple parts, You should download all, before extracting.
Good luck. Repair on Your own risk. Make sure You know what You are doing.
Image preview - the first page of the document
>> Download Acer TravelMate 7740_7740Z_Quanta_ZYD_Rev3B documenatation <<
Text preview - extract from the document
5 4 3 2 1
Channel A
64MB/128MB x 8
D
intel Channel B
P19, 20
D
Arrandale(UMA) HDMI
Dual Channel DDR III ATI GPU
DDRIII-SODIMM1
800/1066/1333 MHZ
Clarksfield (Discrete) PCIEX16 LVDS
DDRIII-SODIMM2 IMC GFX Madison/Park M2
P14,15 2.5GT/s Madison LP/PRO 1GB CRT
rPGA37.5mm)
(37.5mm X
989
P16~P23
P4,5,6,7 X'TAL
27.0MHz
X'TAL FDI DMI
14.318MHz
*[Arrandale Only] DMI(x4)
SLG8LV595
FDI DMI INT_CRT *[Arrandale Only] CRT P24
CLK GEN CLK
P3 Display
SATA 0
INT_LVDS *[Arrandale Only] LVDS
C SATA - HDD P24 C
P29
SATA
INT_HDMI
SATA - ODD SATA 1 Level shift HDMI P25
P29
PCIE-6
PCI-E x1
USB-1 MINI CARD
USB Port X1 USB Ibex Peak-M USB-13
WLAN
P33
P28
PCH
USB-8
CCD
P24 P8, 9, 10, 11, 12, 13 PCIE-2
USB-4 USB-10
MINI CARD
Bluetooth Con. P28
P33 X'TAL
32.768KHz
AU6437-GBL USB-3/11/12 PCIE-1 AR8151
Cardreader X'TAL 25MHz
RJ45
B
P31
GIGA LAN P26
B
BATTERY RTC P27
USB Port X2 X'TAL
25MHz
P31 ISL88731A MAX8792ETD+T
DB Azalia SPI SPI ROM
IHDA Batery Charger P37 +VGPU_CORE P43
P8
LPC
RT8206B ISL62872
LPC 3V/5V P38 +VGPU_IO P44
ISL62882 ISL62881HRZ-T
CX20672-11Z NPCE781 CPU core P39 +VGFX_AXG P45
AUDIO CODEC EC
P30 P36 UP6111AQDD HPA00835RTER*2
+1.1V_VTT P40 +1.8V/+1V P46
Power Touch Pad
UP6111AQDD Discharger
Speaker INT. MIC +1.05V P41 P46
P30 P30 Board Con. Board Con.
A A
P33 P34
BOM Option Table RT8207A Thermal Protection
Reference Description +1.5V_SUS P42 P47
IV@ for UMA only SKU K/B Con. SPI FLASH HALL SENSOR Fan Driver
for Discrete Graphic only SKU MIC JACK HP
EV@
P30 P30
W25X16VSS1G (PWM Type)
SP@ special case component P34 P36 P24 P34 Quanta Computer Inc.
* do not stuff PROJECT : ZYD
Size Document Number Rev
3B
Block Diagram
Date: Tuesday, April 06, 2010 Sheet 1 of 50
5 4 3 2 1
1 2 3 4 5 6 7 8
GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)
+3.3V VIN VIN +1.5V +1.5V_SUS +1.8V
VDDR3 +3V_D VDDC PG_GPUIO_EN VDDCI PG_1V_EN +1V (DP PLL PWR) PG_1.5V_EN VDDR1 +1.5V_GPU VDDR4 +1.8V_GPU BJT dGPU_PWROK
MAINON
MOS (AO3413) ISL6264 ISL62872 G9334ADJ & MOS MOS (AO4710) MOS (AO6402)
P21 P42 P43 P45 P41 P45 P21
A
+3_D (0.5A) +VGPU_CORE (20A) +VGPU_IO (4.5A) +1V (3A) +1.5V_GPU (10A) +1.8V_GPU (3A) A
GPU PWR CTRL Option 2 (VDDR3 after VDDR1)
VIN VIN +1.5V +1.5V_SUS +3.3V +1.8V
VDDC PG_GPUIO_EN VDDCI PG_1V_EN +1V (DP PLL PWR) PG_1.5V_EN VDDR1 +1.5V_GPU VDDR3 +1.5V_GPU VDDR4 +1.8V_GPU BJT dGPU_PWROK
MAINON
ISL6264 ISL62872 G9334ADJ & MOS MOS (AO4710) MOS (AO3413) MOS (AO6402)
P42 P43 P45 P41 P21 P45 P21
+VGPU_CORE (20A) +VGPU_IO (4.5A) +1V (3A) +1.5V_GPU (10A) +3_D (0.5A) +1.8V_GPU (3A)
Power States Thermal Follow Chart
CONTROL
POWER PLANE VOLTAGE DESCRIPTION ACTIVE IN
SIGNAL
VIN +10V~+19V MAIN POWER ALWAYS ALWAYS
B B
+VCCRTC +3V~+3.3V RTC POWER ALWAYS ALWAYS NTC
+3VPCU +3.3V EC POWER ALWAYS ALWAYS Thermal
Protection
+5VPCU +5V CHARGE POWER ALWAYS ALWAYS
+15V +15V CHARGE PUMP POWER ALWAYS ALWAYS
+3V_S5 +3.3V LAN/BT/PCH S5_ON S0-S5
CPU H_ORICHOT# PM_THRMTRIP# SYS_SHDN# 3V/5 V
+5V_S5 +5V USB POWER S5_ON S0-S5
CORE PWR H/W Throttling
CPU WIRE-AND SYS PWR
+5V +5V HDD/ODD/Codec/TP/CRT MAINON S0
+3V +3.3V CLK GEN/PCH/GPU/LVDS/Mini card/Codec/card MAINON
Reader S0
+1.5V_SUS +1.5V CPU/SODIMM CORE POWER SUSON S0-S3 SML1ALERT#
+0.75V_DDR_VTT +0.75V SODIMM Termination POWER MAINON S0 PCH FAN Driver FAN
+VGFX_AXG variation Internal GPU POWER GFX_ON S0
+1.8V +1.8V CPU/PCH/Braidwood POWER MAINON S0 SM-Bus
C C
+1.5V +1.5V MINI CARD/NEW CARD POWER MAINON S0
+1.1V_VTT +1.05V or +1.1V CPU VTT POWER MAINON S0 EC
CPUFAN#
+1.05V +1.05V PCH CORE POWER MAINON S0
+VCC_CORE variation CPU CORE POWER VRON S0
LCDVCC +3.3V LCD POWER LVDS_VDDEN S0
Discrete enable
+5V_GPU +5V SWITCHABLE PWM IC POWER dGPU_PWR_EN#
+3V_D +3.3V I/O POWER for 3.3V pins dGPU_VRON Discrete enable
+VGPU_CORE +0.9V~+1.1V GPU CORE POWER +3V_D Discrete enable
+VGPU_IO +0.9V~+1.1V GPU I/O POWER PG_GPUIO_EN Discrete enable
+1V +1V DP/PEG POWER PG_1V_EN Discrete enable
+1.5V_GPU +1.5V VRAM CORE POWER PG_1.5V_EN Discrete enable
+1.8V_GPU +1.8V GPU_CRE/LVDS/PLL POWER +1.5V_GPU Discrete enable
D D
Quanta Computer Inc.
PROJECT : ZYD
Size Document Number Rev
3B
PWR Status & GPU PWR CRL & THRM
Date: Tuesday, April 06, 2010 Sheet 2 of 50
1 2 3 4 5 6 7 8
5 4 3 2 1
D D
150mA(30mil)
+1.5V L53 595@PBY160808T-181Y-N/2A/180ohm_6 +1.5V_CLK 80mA(20mil)
+VDDIO_CLK L51 PBY160808T/2A/180ohm_6+1.05V
C692 C693 C714
C760 C689 C700 C688 C695
*1u/10V_4.1u/16V_4 .1u/16V_4 .1u/16V_4
R549 .1u/16V_4 .1u/16V_4 10u/Y5V_8 10u/Y5V_8
*585@0_6 U27
Place each 0.1uF cap as close as
modify 1202 1 VDD_DOT possible to each VDD IO pin. Place
17 VDD_SRC VDD_SRC_I/O 15 the 10uF caps on the VDD_IO plane.
24 VDD_CPU VDD_CPU_I/O 18
20mil 5 VDD_27
+3V L56 BLM18AG601SN1D/200mA/600ohm_6 +3V_CLK 29 3
VDD_REF DOT_96 CLK_BUF_DREFCLK 10
DOT_96# 4 CLK_BUF_DREFCLK# 10
CLK_SDATA 31
C726 C431 C718 CLK_SCLK SDA R257 *EV@33_4
32 SCL 27M 6 27M_CLK 17
7 CLK_VGA_27M_SS R542 *EV@33_4 CLK_27M_SS 17
4.7u/10V_8 .1u/16V_4 .1u/16V_4 27M_SS C715 *EV@10p/50V_4
R545 33_4 CPU_SEL 30 10
10 CLK_ICH_14M REF_0/CPU_SEL SRC_1/SATA CLK_BUF_PCIE_3GPLL 10
SRC_1#/SATA# 11 CLK_BUF_PCIE_3GPLL# 10
C701 33p/50V_4 13
SRC_2 CLK_BUF_DREFSSCLK 10
C SRC_2# 14 CLK_BUF_DREFSSCLK# 10 C
XTAL_IN 28
Y4 XTAL_IN +3V
14.318MHz XTAL_OUT 27 16 R525 10K_4
XTAL_OUT *CPU_STOP#
C697 33p/50V_4 2 20
VSS_DOT CPU_1 TP51
8 VSS_27 CPU_1# 19 TP50
9 VSS_SATA CPU_0 23 CLK_BUF_BCLK 10
12 VSS_SRC CPU_0# 22 CLK_BUF_BCLK# 10
21 VSS_CPU
IDT: AL003197001 (ICS9LVS3197AKLFT) 26 25 CK_PWRGD_R
VSS_REF CKPWRGD/PD#
33
Realtek: AL000890000 (RTM890N-632-GRT) GND
Silego: AL000595000 (SLG8LV595VTR)
SLG8LV595V
+3V
CPU_CLK select SMBus
B
+1.05V
CLK Enable +3V B
R279
R522
2
R544 2.2K_4 1K/F_4
*10K_4
3 1 CLK_SDATA CLK_SDATA 14,15,28
10 ICH_SMBDATA
CK_PWRGD_R
CPU_SEL Q21
3
2N7002K Q29
2N7002K
R550 C729
+3V 39 VR_PWRGD_CK505# 2 R521
10K_4 *10p/50V/COG_4 100K/F_4
1
R278
2
2.2K_4
0 1
3 1 CLK_SCLK CLK_SCLK 14,15,28
10 ICH_SMBCLK
A CPU_SEL CPU0/1=133MHz CPU0/1=100MHz Q20 A
2N7002K
(default)
Quanta Computer Inc.
PROJECT : ZYD
Size Document Number Rev
3B
Clock Generator
Date: Tuesday, April 06, 2010 Sheet 3 of 50
5 4 3 2 1
5 4 3 2 1
AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI) AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)
Processor Compensation Signals
U26A U26B
B26 R444 49.9/F_4 R476 20/F_4 H_COMP3 AT23
PEG_ICOMPI COMP3
A26 A16 CLK_CPU_BCLK 11
PEG_ICOMPO BCLK
MISC
MISC
A24 B27 R475 20/F_4 H_COMP2 AT24 B16 CLK_CPU_BCLK# 11
8 DMI_TXN0 DMI_RX#[0] PEG_RCOMPO COMP2 BCLK#
C23 A25 R445 750/F_4
8 DMI_TXN1 DMI_RX#[1] PEG_RBIAS R124 49.9/F_4 H_COMP1 T55
CLOCKS
8 DMI_TXN2 B22 PEG_RXN[0..15] 16 G16 AR30
DMI_RX#[2] PEG_RXN0 COMP1 BCLK_ITP T59
8 DMI_TXN3 A21 K35 AT30
D DMI_RX#[3] PEG_RX#[0] PEG_RXN1 R473 49.9/F_4 H_COMP0 BCLK_ITP# D
J34 AT26
PEG_RX#[1] PEG_RXN2 COMP0
8 DMI_TXP0 B24
DMI_RX[0] PEG_RX#[2]
J33
PEG_RXN3 PEG_CLK
E16 CLK_PCIE_3GPLL 10 Amos 1013
8 DMI_TXP1 D23 G35 D16 CLK_PCIE_3GPLL# 10
DMI_RX[1] PEG_RX#[3] PEG_CLK#
DMI
DMI
B23 G32 PEG_RXN4 T63 AH24
8 DMI_TXP2 DMI_RX[2] PEG_RX#[4] SKTOCC#
A22 F34 PEG_RXN5 A18 DPLL_REF_SSCLK_R R438 IV@0_4 DPLL_REF_SSCLK 10
8 DMI_TXP3 DMI_RX[3] PEG_RX#[5] DPLL_REF_SSCLK
F31 PEG_RXN6 A17 DPLL_REF_SSCLK#_R R440 IV@0_4 DPLL_REF_SSCLK# 10
PEG_RX#[6] PEG_RXN7 H_CATERR# DPLL_REF_SSCLK# R442 EV@0_4
D24 D35 AK14
8 DMI_RXN0 DMI_TX#[0] PEG_RX#[7] Use reverse type CATERR#
THERMAL
THERMAL
G24 E33 PEG_RXN8 R443 EV@0_4
8 DMI_RXN1 DMI_TX#[1] PEG_RX#[8]
F23 C33 PEG_RXN9 Layout Note: Place
8
8
DMI_RXN2
DMI_RXN3 H23
DMI_TX#[2]
DMI_TX#[3]
PEG_RX#[9]
PEG_RX#[10]
D32 PEG_RXN10
PEG_RXN11
(at GPU side) SM_DRAMRST#
F6 CPU_DDR3_DRAMRST# CPU_DDR3_DRAMRST# 35 these resistors
B32 ◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo