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5 4 3 2 1
Project code: 91.4GH01.001 CPU DC/DC
ISL62882
SJV50-CP Block Diagram PCB P/N
REVISION
: 48.4GH01.0SB
: 09284-SB
INPUTS OUTPUTS
DCBATOUT VCC_CORE
45,46
Intel CPU SYSTEM DC/DC
Clock Generator DDRIII Slot 0 ATI TPS51123
D
ICS9LRS3197AKLFT 3 800/1066/1333 20
DDRII Channel A Arrandale PCI EXPRESS GRAPHIC Madison
VRAM
INPUTS OUTPUTS
D
sDDR3 1Gb*8
Clarksfield X16 Park
58...62
63...66 DCBATOUT
5V_S5
3D3V_S5 47
DDRIII Slot 1 DDR II Channel B 4,5,..,9,10
800/1066/1333 21
SYSTEM DC/DC
TPS51117
Digital Display
LVDS 2CH
RGB CRT
DMIx4 FDIx8 INPUTS OUTPUTS
DCBATOUT 1D5V_S3
48
Mini-Card 1 PCIE+USB 2.0 PCH RGB CRT Switch CRT
SYSTEM DC/DC
WLAN 37 INTEL 24
TPS51117
INPUTS OUTPUTS
LCD
PCH PCH LVDS 2CH Switch
WXGA+ 23 DCBATOUT 1D05V_S0
48
Mini-Card 2 14 USB 2.0/1.1 ports
3G 37 ETHERNET (10/100/1000Mb) PCH Digital Display Switch HDMI25
SYSTEM DC/DC
C C
High Definition Audio
TPS51117
INPUTS OUTPUTS
6 SATA ports
Giga LAN 8 PCIE ports
WEBCAM 23 DCBATOUT 1D05V_VTT
RJ45 PCIE 49
CONN 31 BCM57780 ACPI 1.1
30 LPC I/F
RT9025
BLUETOOTH28
INPUTS OUTPUTS
PCI/PCI BRIDGE
3D3V_S0 1D8V_S0
USB 2.0 50
INT MIC HD AUDIO USB x 4 29
CODEC AZALIA G2997
ALC272 32 Card Reader SD/MMC INPUTS OUTPUTS
MIC IN 36
AU6433 MS/MS Pro/xD 36 1D5V_S3 0D75_S0
50
LINE OUT SATA HDD 26 SYSTEM DC/DC
ISL62881
SATA
B INPUTS OUTPUTS B
OP AMP SATA ODD 27 DCBATOUT VCC_GFXCORE
2CH SPEAKER 52
G1454 33
SPI
Flash ROM
PCB STACKUP
SYSTEM DC/DC
11,12,...,18,19 40 TPS51117
4MB
TOP
INPUTS OUTPUTS
MODEM
RJ11 DCBATOUT +VGA_CORE
MDC CARD LPC Bus LPC debug GND 53
35 40
S
CHARGER
KBC S ISL88731A
GND INPUTS OUTPUTS
SPI
NPCE781B
39 BOTTOM DCBATOUT BT+
51
A SJV50 A
Thermal Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Flash ROM Touch Int. Taipei Hsien 221, Taiwan, R.O.C.
Sensor MMB
128KB 40 PAD KB39 Title
G787 38 41 42
Block Diagram
FAN Size Document Number Rev
A3
SJV50-CP SB
Date: W ednesday, October 21, 2009 Sheet 1 of 67
5 4 3 2 1
A B C D E
PCH Strapping Processor Strapping
Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is Default
SPKR Reboot option at power-up 1 unless specified otherwise) Value
Default Mode: Internal weak Pull-down.
CFG[4] Embedded 1: Disabled - No Physical Display Port attached to 1
No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-k Embedded DisplayPort.
- 10-k weak pull-up resistor. DisplayPort
Presence 0: Enabled - An external Display Port device is
INIT3_3V# Weak internal pull-down. Do not pull high. connected to the Embedded Display Port.
4 GNT3#/ Default Mode: Internal pull-up. CFG[3] PCI-Express Static 1: Normal Operation. 1
4
GPIO55 Low (0) = Top Block Swap Mode (Connect to ground with 4.7-k weak Lane Reversal 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
pull-down resistor).
CFG[0] PCI-Express 1: Single PCI-Express Graphics 1
INTVRMEN High (1) = Integrated VRM is enabled Configuration 0: Bifurcation enabled
Low (0) = Integrated VRM is disabled Select
GNT0#, Default (SPI): Left both GNT0# and GNT1# floating. No pull up
GNT1# required. CFG[7] Reserved - Clarksfield (only for early samples pre-ES1) - 0
Temporarily used Connect to GND with 3.01K Ohm/5% resistor
Boot from PCI: Connect GNT1# to ground with 1-k pull-down
resistor. Leave GNT0# Floating. for early Note: Only temporary for early CFD samples
Clarksfield (rPGA/BGA) [For details please refer to the WW33
Boot from LPC: Connect both GNT0# and GNT1# to ground with 1-k samples. MoW and sighting report].
pull-down resistor. For a common motherboard design (for AUB and CFD),
GNT2#/ Default - Internal pull-up. the pull-down resistor should be used. Does not
GPIO53 Low (0)= Configures DMI for ESI compatible operation (for servers impact AUB functionality.
only. Not for mobile/desktops).
GPIO33 Default: Do not pull low.
Disable ME in Manufacturing Mode: Connect to ground with 1-k
pull-down resistor.
SPI_MOSI Enable iTPM: Connect to Vcc3_3 with 8.2-k weak pull-up resistor.
3 Disable iTPM: Left floating, no pull-down required. 3
NV_ALE Enable Danbury: Connect to Vcc3_3 with 8.2-k weak pull-up
resistor.
Disable Danbury: Connect to ground with 4.7-k weak pull-down
resistor.
NC_CLE Weak internal pull-up. Do not pull low.
HAD_DOCK_EN# Low (0): Flash Descriptor Security will be overridden.
/GPIO[33] High (1) : Flash Descriptor Security will be in effect.
HDA_SDO Weak internal pull-down. Do not pull high.
HDA_SYNC Weak internal pull-down. Do not pull high.
GPIO15 Weak internal pull-down. Do not pull high.
GPIO8 Weak internal pull-up. Do not pull low.
GPIO27 Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
2 2
PCIE Routing USB Table
LANE1 LAN Pair Device
0 USB3
LANE2 MiniCard WLAN 1 USB2
2 USB4
3 MINICARD1
4 WECAM
5 Touch Panel (X)
6 NC
7 NC
8 NC
9 USB1(HS)
SJV50
10 Finger Print (X)
1 1
11 Blue Tooth
Wistron Corporation
12 MINIC2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
13 Cardreader
Title
Table of Content
Size Document Number Rev
A3
SJV50-CP SB
Date: W ednesday, October 21, 2009 Sheet 2 of 67
A B C D E
1D5V_S0_CLKGEN
C581
1
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY C579
SC1U6D3V2KX-GP
1D5V_S0 R231 1 2
0R3J-0-U-GP 1D05V_S0
2
2
1 R229 2
R457 0R0603-PAD
1 2 1D5V_S0_CLKGEN
3D3V_S0 -1 0925 -1 0925 3D3V_S0
0R3J-0-U-GP
4 4
1 R499 2 3D3V_CK505 3D3V_CK505_IO R4961 2
0R0603-PAD C583 C577 0R3J-0-U-GP
1
1
1
1
1
1
1
1
1
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C580 C569 C571 C572 C573 C576
DY
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
C565 DY DY DY C574
SC1U10V2ZY-GP
SC1U10V2ZY-GP
DY DY
2
2
2
2
2
2
2
2
2
2
-1 0929 SA 0622 EMI
VGA_XIN1_L 1 2
-1 0925 -1 0925 OSC_SPREAD_L DY EC22 2 SC22P50V2JN-4GP
24
17
29
15
18
1
1
5
U19 DY EC21 SC22P50V2JN-4GP
VDDCPU_3_3
VDDSRC_3_3
VDDREF_3_3
VDDDOT96MHZ_3_3
VDDSRC_IO
VDDCPU_IO
VDD_27MHZ
-1 0925
RN
ATI_ES
12 DREFCLK# 4 RN30 1 DREFCLK#_R 4 DOT96C_LPR 27MHZ_NONSS 6 VGA_XIN1_L R12 1 2 0R2J-2-GP VGA_XIN1 59
RN
12 DREFCLK 0R4P2R-PAD 3 2 DREFCLK_R 3 7 OSC_SPREAD_L 1
DOT96T_LPR 27MHZ_SS TP133
4 RN34 1 CLKIN_DMI#_R 14 3D3V_S0
12 CLKIN_DMI# SRCC1_LPR
RN
12 CLKIN_DMI 0R4P2R-PAD 3 2 CLKIN_DMI_R 13 16 CPU_STOP# R226 1 2 10KR2J-3-GP
SRCT1_LPR CPU_STOP# CLK_EN
CLKPWRGD/PD#_3_3 25
12 CLK_PCIE_SATA# 4 RN33 1 CLK_PCIE_SATA#_R 11
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