Service Manuals, User Guides, Schematic Diagrams or docs for : apple Apple_Q16_MLB_PB15_051-6680_RevE
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8 7 6 5 4 3 2 1
CK ENG
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD APPD
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. REV ZONE ECN DESCRIPTION OF CHANGE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. DATE DATE
E 396944 08/26/05?
PRODUCTION RELEASED
D PAGE CONTENTS PAGE CONTENTS D
VIDEO CONNECTORS - INVERTER,DVI,
1 TITLE PAGE AND CONTENTS 23 LVDS,S-VIDEO
2 SYSTEM BLOCK DIAGRAM 24 SPIDEY,PWR BUTTON,ALS SCHEM,MLB,PB15"
3 POWER BLOCK DIAGRAM 25 MMM & BATTERY CURRENT SENSE CIRCUIT 08/25/2005
4 PCB NOTES AND HOLES 26 INTERNAL CONNECTORS-AIRPORT,HDD,ODD
5 MPC7447A MAXBUS INTERFACE 27 FAN CONTROLLER,SW MODEM,SERIAL DEBUG
SOUND/LEFT USB/BLUETOOTH BOM OPTIONS (IN COMMON PARTS)
6 MPC7447A DATA/NC PINS/BOOTBANGER 28 GIGABIT ETHERNET INTERFACE STUFF NO STUFF
1_8V_MAXBUS 1_5V_MAXBUS
7 CPU PLL AND CONFIGURATION STRAPS 29 FIREWIRE PHY
NO_SSCG SSCG
C 8 INTREPID MAXBUS AND BOOT STRAPS 30 FIREWIRE PORTS 5V_HD_LOGIC 3V_HD_LOGIC C
9 INTREPID MEMORY INTERFACE/BOOTROM 31 PMU NO_BBANG BBANG
INT_2_5V_COLD INT_2_5V_HOT
10 DDR MEMORY MUXES 32 BATTERY CHARGER AND CONNECTOR
ATI_MEMIO_HI ATI_MEMIO_LO
11 400PIN STACKED DDR SODIMM CONNECTOR 33 PBUS SUPPLY,PMU SUPPLY,SUPERCAP
,BACKUP BATTERY
SOFT_MODEM USB_MODEM
EMI
GPU_PWRMSR
12 INTREPID AGP 4X/PCI 34 3.3V/5V SYSTEM POWER SUPPLY
GPU_SS EXT_TMDS (BETTER/BEST)
13 INTREPID ENET/FW/UATA/EIDE
INTERFACES 35 CPU CORE VOLTAGE POWER SUPPLY VGA_BUFFER_RES INT_TMDS (BEST128)
MMM SUPERCAP
14 INTREPID GPIOS/SERIAL/USB
INTERFACES/SSCG
36 1.5V/1.8V/2.5V SYS. POWER SUPPLIES
INT_TMDS (BETTER/BEST) ADT7460
15 INTREPID POWER RAILS/1.5V LDO 37 SIGNAL CONSTRAINTS(PG1)-DDR MEM/CLK EXT_TMDS (BEST128)
B 16 INTREPID DECOUPLING 38 SIGNAL CONSTRAINTS(PG2)-CPU BACKUP_BATT
ADT7467
B
17 USB 2.0 INTERFACE (uPD720101) 39 SIGNAL CONSTRAINTS(PG3)-DIGITAL/DIFF
18 CARDBUS INTERFACE (PCI1510) 40 SIGNAL CONSTRAINTS(PG4)-POWER NETS
19 M11 AGP INTERFACE & SPREAD SPECTRUM 41 FUNCTIONAL TESTPOINTS
20 EXTERNAL TMDS (DUAL TMDS - SIL178) 42 REVISION HISTORY
21 M11 LVDS/TMDS/GPIO & GPU VCORE 43-46 SCHEMATIC CREF AND NETLIST REPORTS
22 M11 POWER
DIMENSIONS ARE IN MILLIMETERS
METRIC Apple Computer Inc.
TABLE_5_HEAD
XX
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
A 051-6680 1 SCHEM,MLB,PB15 SCH1
TABLE_5_ITEM
X.XX
DRAFTER DESIGN CK NOTICE OF PROPRIETARY PROPERTY A
TABLE_5_ITEM
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
820-1679 1 PCBF,MLB,PB15 PCB1 X.XXX PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
TABLE_5_ITEM
ENG APPD MFG APPD
826-4393 1 LABEL,PCB,28MM X 6MM EEE:U3Z LABEL_BST128 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
ANGLES II NOT TO REPRODUCE OR COPY IT
TABLE_5_ITEM
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
826-4393 1 LABEL,PCB,28MM X 6MM EEE:U40 LABEL_BST64
TABLE_5_ITEM
QA APPD DESIGNER TITLE
826-4393 1 LABEL,PCB,28MM X 6MM EEE:U41 LABEL_BTR DO NOT SCALE DRAWING
RELEASE SCALE
NONE
SCHEM,MLB,PB15
SIZE DRAWING NUMBER
MATERIAL/FINISH
NOTED AS D 051-6680 REV.
E
THIRD ANGLE PROJECTION APPLICABLE SHT 1 OF 46
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
J23 J24 J20 J2
Ethernet FW - A FW - B RUX Board
Connector Connector Connector J15 J3 Connector
P.30 P.24 J16
P.28 P.30 SW MODEM LIO/Audio J19 C692
BACKUP
2 DATA PAIRS Connector Connector ALS BOARD BATTERY
4 DATA PAIRS @ 200MHz 2 DATA PAIRS
@ 400MHZ P.27 P.27 Connector CONNECTOR SUPERCAP
D U36
J13
P.24 P.33 P.33 D
U43
FireWire ODD
Ethernet PHY Connector J26 J27
PHY P.29
P.28 P.26 Battery Power Supply DC-In
J12 Connector & Charger Connector
G/MII P.32 P.32-36
3.3V 1394 OHCI HDD P.32
10/100/1000 3.3V Connector J8
U53/J1/J18
8BIT TX 8BIT TX/RX EIDE
8BIT RX 50MHZ P.26 I2S I2C Fan SLEEP SMBUS
125MHZ I2C Circuit LED 3.3V J5
UIDE P.27 P.24 CARDBUS
U15/U20/U58 U28
NOT USED Connector
MMM
P.25 ETHERNET
10/100/1000
FIREWIRE
400 MB/S
UATA 100 EIDE CARDSLOT I2S I2C
P.14 P.13
PMU P.18
P.13 P.13
P.13 P.13 P.13
P.14 J28 P.31 33MHZ
C U41 Serial Debug SERIAL 16/32 BITS C
BATTERY PORT
NOT USED USB P.14A SCCA Connector 5V 3.3V/5V
CURRENT P.14
SENSOR P.27 U8
NOT USED USB PORT B
P.25 P.14
USB PORT C
U51 VIA/PMU
P.14 U11 J6
TI PCI1510
CardBus
J3
BlueTooth (LIO)
NOT USED P.14
NOT USED USB PORT D
P.14
INTREPID BOOTROM
P.12
BOOT ROM
1M X 8
P.9
AIRPORT
Connector
P.26
Controller
P.18
P.27
USB PORT E PCI
J10 P.14 64BITS PCI BUS
USB PORT F 33MHZ 32BITS
SPIDEY P.14 P.12 33MHZ
AGP BUS 3.3V
P.24 1.5V/3.3V U47
MEMORY MEMORY
MAXBUS
P.8 4X AGP
32BITS
66MHZ ATI CH. A CH. C
U17
B
MAXBUS DDR MEMORY
P.9
P.12 M11 (INTERNAL MEM)
(INTERNAL MEM) NEC USB2.0
EHCI HC
B
1.8V
167MHZ
32BIT ADDRESS MEMORY BUS
64MB MEMORY MEMORY
CH. B CH. D
J3
P.17
64BIT DATA 2.5V P.19-22 (INTERNAL MEM)
(INTERNAL MEM)
167MHZ J4 LEFT USB
(VIA SIL1162)
COMPOSITE
U56 U16/U18/U28/U27 64BITS (VIA LIO)
EDID (I2C)
Inverter P.27
S-VIDEO
TMDS
CPU PLL 2:1 DDR MUXES Connector
APOLLO J17
RGB
DDC
Config
LVDS
P.23 RIGHT USB
P.7 P.10
CPU (VIA STATLER)
P.27
(MPC7447) J14 J21 J22
PMU
P.5-6 LCD Panel S-Video DVI-I
J25 Connector Connector Connector
DDR SDRAM DIMM 0 P.23 P.23 P.23 SYSTEM BLOCK DIAGRAM
A NOTICE OF PROPRIETARY PROPERTY
A
DDR SDRAM DIMM 1 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
SO-DIMM Connector I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
P.11 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE DRAWING NUMBER REV.
APPLE COMPUTER INC.
D 051-6680 E
SCALE SHT OF
NONE 2 46
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
POWER SYSTEM ARCHITECTURE
+5V_MAIN
1V20_REF -
>~13.44V TURNS-ON
PG 33
BACKLIGHT VCC MAP31 DDR CORE DCDC_EN
<~13.44V SHUTS-OFF
+
INVERTER MAP31 DDR I/O SLEEP
MAIN 2.5V/1.5V DDR POWER
D AC RUN/SS D
+PBUS
DC/DC +2.5V_MAIN
ADAPTER INRUSH BUCK MAXBUS
LIMITER +24V_PBUS REGULATOR (MAX1715) SEQUENCING
IN PG 32
VCC
(LTC1625)
+PBUS PG 36 PGOOD 1_5V_2_5V_OK
PG 32 PG 33 SHUTDOWN: STOPPED
14V_PBUS +5V_MAIN SLEEP: RUNNING +1.5V_MAIN
AC: 12.8V RUN: RUNNING
NO AC: BATTERY VOLTAGE INTREPID CORE
1625 NOT RUNNING TURNS ON OUTPUT @ 2.4V
ON1/ON2
AGP I/O +5V_MAIN
SHUTDOWN: RUNNING
SLEEP: RUNNING VCC SHDN
RUN: RUNNING
+5V_MAIN
DCDC_EN_L
AFTER PMU IS UP AND RUNNING DC/DC
RC AT 1M*0.047UF @ 24V DCDC_EN_L WILL PULL ON1/ON2
(MAX1717)
+3V_PMU STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW
LOW IN SHUTDOWN
+5V_MAIN
+BATT LDO +3V_PMU SHUTDOWN: STOPPED
+4_6V_BU
RUN/SS>1V- 5V
TURNS ON AT +5V_MAIN +PBUS VCC
EXT_VCC SLEEP: STOPPED
RUN: RUNNING C
C PG 33 <100UA ALLOWED
INTERNAL ZENER CLAMP TO 6V DC/DC
MAIN 3V/5V PGOOD 3V_5V_OK (LTC1778) GPU_VCORE PG 35
DC/DC SHUTDOWN: STOPPED +1.2V
(LTC3707) HOLDS BOTH RUN/SS AT GND
DCDC_EN SLEEP: D3COLD CPU_VCORE
VCC STBYMD
WHEN IT'S CONNECTED TO GND
RUN: RUNNING (+1.385V)
14V_PBUS PG 34 TURNS CONTROL TO RUN/SS
WHEN IT'S OPEN
SLEEP
D3_COLD TURNS ON AS LOW AS 0.8V/TYP 1.5V
INTERNAL 1.2UA CURRENT SOURCE
SHUTDOWN: STOPPED
SLEEP: RUNNING GPU_VCORE RUN/SS PG 20
SEQUENCING 1_5V_2_5V_OK WILL NOT PULL LOW UNTIL
RUN: RUNNING
BACKUP 14V CHARGES BACKUP BATTERY
INTERNAL ZENER CLAMP TO 6V
+3.3V_MAIN
+5V_MAIN TURNS ON
HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER
<100UA ALLOWED 1M & 0.1UF @14V, IT TAKES DCDC_EN_L OR PMU_POWERUP_L
BATTERY TURNS ON AT >1V ~5.88MS TO START SWITCHER 1_5V_2_5V_OK BECOMES '1'; MUCH LESS THAN THE
RUN/SS - 3V D3_HOT RC CHARGING AT INT_VCC (5V)
DCDC_EN_L
D3_HOT
24V IS OUTPUT ONLY FROM
BACKUP BATTERY
RC AT 1M*0.1UF @ 24V
STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW
CHARGER INPUT SHUT-DOWN RUN SLEEP RUN SHUT-DOWN
NO INRUSH PROTECTION
& BOOST OUTPUT WHEN ONLY BATTERY IS CONNECTED SLEEP
B PG 33 +24V_PBUS SLEEP_L_LS5
B
BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS
DCDC_EN
AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V DC/DC DCDC_EN_L
(UNTIL DRAINED)
(LTC3411) +5V_MAIN ~2.23MS
+1.8V_MAIN
BATTERY +5V_SLEEP
SHUTDOWN: STOPPED MAXBUS +3V_MAIN ~7.36MS
CHARGER SLEEP: STOPPED
RUN: RUNNING +3V_SLEEP
(MAX1772) PG 36 3V_5V_OK 2.4V - ??? MS
PG 32 +2_5V_MAIN ??? MS
+2_5V_SLEEP
+BATT +1_5V_MAIN ??? MS
NO INRUSH PROTECTION +1_5V_SLEEP
3S 2P 18650 CELLS WHEN ONLY BATTERY IS CONNECTED
1_5V_2_5V_OK
(MAX1715 OUTPUT)
BATTERY VOLTAGE 1_5V_2_5V_OK
(AT LTC1778 RUN/SS)
POWER BLOCK DIAGRAM
A +PBUS NOTICE OF PROPRIETARY PROPERTY
A
GPU_VCORE ~8.2MS
FEED-IN PATH (D3HOT)
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
GPU_VCORE AGREES TO THE FOLLOWING
(D3COLD)
PG 32 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE DRAWING NUMBER REV.
APPLE COMPUTER INC.
D 051-6680 E
SCALE SHT OF
NONE 3 46
8 7 6 5 4 3 2 1
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