Service Manuals, User Guides, Schematic Diagrams or docs for : panasonic DVD DMR-EX96 DSD1304004CE doc bk11_dvb
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IC91001,IC92001,IC92002, IC91001
IC92801,IC92802,IC95002, (SET TOP BOX DECODER)
IC96202,IC96205
(+3.3V)
IC91901 IC91904 IC92201
(REG.D+3.3V) (REG.D+2.5V)
FROM P7801 P91001 X SW+12.5V PW D+3.3V PW D+2.5V DQ16-DQ31 DATA BUS LINE
2 VIN VOUT 3 4 VIN VOUT 5 IC91001,IC95002(+2.5V)
MAIN P.C.B. 3,4 17,18
ON H CE DRAM/
7 3 512MBIT
FROM Q95001
DIGITAL P.C.B. P7801 P91001 DI P ON H
ANALOG TIMER 6 15 REGULATOR IC95002(+1.2V)
BLOCK SECTION IC91902
(REG.D+1.8V)
DRAM IC92202
A0-A13 ADDRESS BUS LINE
I/F
PW D+1.8V
2 VIN VOUT 3 IC91001,IC92201,
ON H IC92202(+1.8V)
7
DRAM/
512MBIT
IC91903 IC96201 DQ0-DQ15 DATA BUS LINE
(REG.D+1.2V) (REG. +5V)
PW D+1.2V PW +5V CAM
2 VIN VOUT 3 IC91001(+1.2V) 4 VIN VOUT 5 P96201 (+5V)
ON H EN
7 2 IC92801
(64 MBIT FLASH MEMORY)
CI 5V EN SPI HOLD
IC96203 U32 PIO5 (5) PIO15(5) AH6 1 HOLD-
(REG.+5V) G SPI CS
PIO15(2) AJ5 7 CS-
Q
FROM P7801 P91001 X SW +5.8V PW +5V CI PIO15(3) AL5 8 Q
4 VIN VOUT 5 P96202 (+5V)
MAIN P.C.B. 2 19 SPI WP
EN PIO15(4) AK5 9 WP/VPP
3
IC92002
(RESET) D
PIO15(1) AL4 15 D
CLK
X RST CPU PIO15(0) AM4 16 CLK
5 VCC Y 4 B32 NOT RESET IN
IC92001 B
(RESET) 2
IC92802
5 VDD OUT 4 (BUFFER)
MAIN P.C.B. PIO0(7) AC30 1
1OE
1A 1Y
IC95002 PIO2(2) W30 2 3
TU7801 (DVB-T/C RECEIVER)
U/V TUNER 2OE
4
IF OUT (-) VBASE 3
P7802 P95001 2A 2Y
IFD OUT2 19 10 IM PIO2(3) W28 5 6
5 1 NOT RESET 32
CKG TSCL1 4OE
SCL 30 V31 PIO2(5) 13
P7802 P95001 IF OUT (+) G TSDA1 4A 4A
IFD OUT1 18 11 IP SDA 29 V30 PIO2(6) PIO2(4) V29 11 12
3 3
D0 33
D1 35
IF AGC D2 36 TSO D0-7
P7802 P95001
IF AGC 20 17 AGC IF D3 37
1 5 TS0 D0-D7/CI TSI D0-D7 DATA BUS LINE TS I/F Y OUT DEC Y OUT P91001 P7801
D4 39 AG30 TO
3 18 MAIN P.C.B.
D5 40 VIDEO
14 XTAL O ANALOG VIDEO
D6 42 DAC
C OUT DEC C OUT P91001 P7801
X95001 D7 43 AJ32 BLOCK SECTION
(27MHz) 1 20
GKG TSO
15 XTAL I CLK OUT 44 25 TS3VICLK IC91905
IC96202 (BUFFER AMP)
(3.3V-5.0V LEVEL SHIFT)
28 TS3VI7 AUDA RIGHT OUT P
AK15 5
+ DEC AUD R P91001 P7801
- 7
P96201 5 16
35 TS3VI0 AUDA RIGHT OUT N TO
(COMMON INTERFACE) AL15 6
AUDIO MAIN P.C.B.
25 TS3VICLK DAC AUDA LEFT OUT P ANALOG AUDIO
AL17 3 BLOCK SECTION
+ DEC AUD L P91001 P7801
- 1
A0-A14 ADDRESS BUS LINE CI D0-D7 DATA BUS LINE
AUDA LEFT OUT N 7 14
AM17 2
FMI FMI
EMI/ EMI/
D0-D7 DATA BUS LINE TS/ CI A0-A14 ADDRESS BUS LINE TS/ STM DATA TX P91001 P7801 P7402 P59001
I/F I/F UART1 TX AC28
11 11 59 TO/FROM
STM DATA RX P91001 P7801 P7402 P59001 DIGITAL P.C.B.
UART1 RX AB27
10 10 57 ANALOG TIMER
MDO0-MDO7 DATA BUS LINE CI TSO D0-D7 DATA BUS LINE T CS P91001 P7801 P7402 P59001 BLOCK SECTION
UART1 CS AA27
TS OUT 12 9 55
ASC2 TXD P91001 P7801 P7402 P59001 TO/FROM
UART0 TX AE31
91 TS5VOCLK 14 7 49 DIGITAL P.C.B.
ASC2 RXD P91001 P7801 P7402 P59001 BACK END
TS IN UART0 RX AE32
13 8 47 BLOCK SECTION
83 TS5VICLK
SYS CLK OSC AH22
TS IN X92001
(30MHz)
MDI0-MDI7 DATA BUS LINE
SYS CLK IN AJ22
DMR-EH76EC,EX86EB/EC,EX96CEG
DVB-C CI (EX96CEG) Block Diagram
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