Service Manuals, User Guides, Schematic Diagrams or docs for : panasonic TV DX4P chassis DX4P-CHASSISNATG
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NEW
TECHNOLOGY
COLOR TELEVISION SYSTEM
DX4P CHASSIS
DX4P TG
Central Processing Unit
-1-
Figure 1. Central Processing Unit Block Diagram
Signal Processing
-2-
Figure 2. Signal Processing Block diagram
DX4P TG
Y/C Separator
The Importance of a Comb Filter
The luminance and chroma information are mixed in bandpass filter limits the amount of usable luminance
the composite TV signal and must be separated so the information and lowers the picture resolution.
TV can properly use each portion. A color TV that does A comb filter separates the luminance and chroma in a
not have a comb filter can separate the luminance from different, more selective method which allows the TV to
the chroma by using a bandpass filter. However, a use more of the luminance and maintain more detail.
Figure 3. Y/C Separation Block Diagram
The Y/C separator uses the configuration shown in The diagonal resolution improvement circuit improves
Fig. 3. After a non delayed signal, a 1H delayed signal, the diagonal resolution of the Y signal. Meanwhile, 3
and a 2H delayed signal pass through band pass filter line C passes through the cross color canceller and is
BPF1, they enter a 3 line comb filter. The 3 line comb output as a C signal.
filter outputs a C signal called 3 line C. The output The C signal BPF and Y signal notch filter
signal of the dot canceller switches BPF-C which is the characteristics can be switched between narrow band
C signal output from 3 line C and BPF-1 and outputs a and broad band. Both become broad band using 0 and
Y signal. narrow band using 1.
DX4P TG -3-
RGB Signal Processing
-4-
Figure 4. RGB Signal Flow Block diagram
DX4P TG
RGB signal processing
White Character Correction Circuit OSD Insertion Circuit
White character correction expresses clear white 1. Input signal
characters by increasing the B-Y signal level of areas Color is displayed using three signals, 4 bit, R,G
where there is no color and the brightness level is high, and B. 4096 colors can be displayed. The OSD
and converting to a whiter telop character. signal can be inserted at a synthesis ratio with any
video signal according to the a blending signal (4
Black Level Correction Circuit
bits) from the microcontroller. The video signal is
The black level correction circuit detects the blackest
output when the a blending signals are all low.
area (minimum value) in a screen, and when the
blackest area is above the pedestal level, the circuit 2. Contrast and brightness linking
does expansion correction of the gradation area under The OSD contrast and brightness control is linked
the black level correction start point in the black to the contrast and brightness control of the main
direction so that the blackest area is at the pedestal video signal.
level.
Brightness Control Circuit
Dynamic Gamma Correction Circuit Brightness control is a function that controls the offset
The dynamic gamma correction circuit detects the level of a signal. As data processing for this LSI, the
whitest area in a screen after gamma correction, and pedestal level of the Y image quality correction circuit
when the whitest area is greater than the blooming done with a YUV signal is set adding or subtracting the
level set, the circuit operates so that the whitest area offset control value of the Y signal.
matches the blooming level.
Blanking Signal Generating Circuit
R-Y Demodulation Axis Control Circuit The blanking signal generating circuit and blanking
R-Y demodulation axis control is a function to control signal insertion circuit perform super blanking
the color reproducibility to its optimal level to match the processes on output RGB signals. Super blanking
light emitting characteristics of the display device. makes the retrace line invisible even if the brightness
Control is done by turning the R-Y axis with the angle control is raised to the maximum by lowering the video
of the B-Y signal fixed. signal to a level of the pedestal level or lower during the
horizontal and vertical blanking period when driving a
B-Y Demodulation Gain Control Circuit video display device.
B-Y demodulation axis control is also a function to
control the color reproducibility to its optimal level to Drive and Cutoff Control Circuit
match the light emitting characteristics of the display The drive control circuit has 12 bit drive control value
device. Control is done by changing the B-Y signal gain for each RGB, and 12-bit video signals undergo
from 0 to 2x with the R-Y signal gain fixed. amplitude control as is and are output as 12 bits.
The cutoff control circuit controls cutoff by adding and
RGB Conversion Matrix Circuit subtracting 12-bit cutoff control data to a 12 bit video
For all functions processed by a YUV signal, all signals signal.
for which all processes have ended are converted to an
RGB signal, and ultimately are made into signals for VM Drive Signal Generator Circuit
driving a CRT. VM (Velocity Modulation) signals clearly represent the
contours of a video image by changing the electron
The conversion formula for this is as follows. For beam speed in the contour areas. VM signals are
NTSC, PAL SECAM, 525P, and 480P formats, RGB generated from a brightness signal with the edge
signals are converted based on: corrected by the horizontal contour correction circuit
standing. A VM signal is a brightness signal that has
B = Y + Pb / 0.564 undergone primary differentiation, but noise is not
R = Y + Pr / 0.713 highlighted, so coring processing and a limiter process
G = (Y - 0.114B - 0.299 R) / 0.587 for controlling the effect are required.
Video image
brightness signal
VM Signal VM noise level control
VM Signal Generation
RGB Matrix Processing
DX4P TG -5-
ABL Voltage Control
The ABL voltage (beam current volume) undergoes A/D conversion and the following controls are performed.
1. DC transit level correction: This raises the 3. White character correction ABL control: When the
brightness level according to the increase in beam beam current volume is high, this automatically
current volume to prevent black fill in. eliminates the white character correction effect and
2. ACL control: When the beam current volume is prevents side effects.
high because the FBT load is not raised a certain 4. Black level correction ABL control: When the beam
degree according to the beam current level, this current volume is high, this increases the black
performs control so that the total load is fixed by level correction effect and prevents black fading.
lowering the contrast using feedback control. When the beam current volume is low, this lowers
the black level correction effect and prevents black
fill in. The Fig. 5 is a block diagram of ABL voltage
control.
Figure 5. ABL Voltage Control
ABL voltage
Voltage High
Voltage Low
0% 50% 100%
Input signal APL (%)
Figure 6. ABL Voltage Change Characteristics
-6- DX4P TG
MPU Pin Location
Figure 7. MPU Pin Location
Note: Due to slight software upgrades, two different part numbers can be found on
the DX4P family for the IC4002, MN102H75KTF and MN102H75KTL.
DX4P TG -7-
MPU Pin Description Table
PIN NUMBER TYPE CONTROL FUNCTION DESCRIPTION
2 INPUT /VSYNC Main Picture Vertical Synchrony
5 INPUT /RST Reset
7 INPUT /TEST Test Pin
12 INPUT /HSYNC Main Picture Horizontal Sync
20 INPUT VCOI Internal VCO input (external LPF input)
28 INPUT VREF DAC Reference Voltage Connection
30 INPUT IREF Resistance connecion for DAC bias current setting
31 INPUT COMP DAC phase compensator connection
33 INPUT CLL Clamp Level Low Input
34 INPUT VREFLS CCd reference voltage input
35 INPUT CVBS1 Composite video signal input 1
38 INPUT CVBS0 Composite video signal input 2
39 INPUT VREFHS CCd reference voltage input
40 INPUT CLH Clamp Level High Input
56 INPUT HHS_DET HHS Level Detector
57 INPUT SOS Voltage from each protector circuit
61 INPUT AFC2 Automatic Frequency Control from Tuner 2
62 INPUT ACL1
64 INPUT ACL2
65 INPUT AFC1 Automatic Frequency Control from Tuner 1
66 INPUT KEYSCAN2 Key Scanning (action,shutdown)
67 INPUT KEYSCAN1 Key Scanning (power,ch,vol.)
68 INPUT WP
69 INPUT SOS_2 Voltage from each protector circuit
72 INPUT RMIN Remote Control Input
76 INPUT OSC1 Clock Pulse Signal
79 INPUT FA PORT Service Mode Input
PIN NUMBER TYPE CONTROL FUNCTION DESCRIPTION
1 OUTPUT MOMENT_B_DOWN Momentary Power Down
6 OUTPUT HFR Horizontal Freq.Reference
8 OUTPUT YS Video Signal Out
10 OUTPUT SYSCLK System Clock Output
15 OUTPUT VIDEO-MUTE Video Mute
17 OUTPUT WP
21 OUTPUT PDO Internal phase compare output (external LPF out).
23 OUTPUT YM
24 OUTPUT OSD_B Blue OSD
25 OUTPUT AUDIO-MUTE Audio Mute
26 OUTPUT OSD_G Green OSD
27 OUTPUT OSD_R Red OSD
29 OUTPUT LED SOS Led signal
42 OUTPUT HD/SD SW 1080i/480p switch
43 OUTPUT SERVICE SW Service Switch
44 OUTPUT AUDIO MUTE Mutes audio whe amp is used
45 OUTPUT AC_SW A.C. switch
46 OUTPUT SBD1 Serial interface
47 OUTPUT SBT1 Serial clock signal
48 OUTPUT ROTATION Landing Corr.Circuit
49 OUTPUT H_POSITION H-Raster position circuit
50 OUTPUT V_POSITION V-Center circuit
51 OUTPUT MOIRE_GAIN Tilt Correction circuit
52 OUTPUT HHS_REF HHS circuit
55 OUTPUT DEG_SW Activates Degauss relay
60 OUTPUT HDMIINT High Definition Miltimedia Interface
70 OUTPUT SCL1 I2C Bus Serial Clock 1
73 OUTPUT LPF_SEL Low Pass Filter Selector
-8- DX4P TG
75 OUTPUT OSC2 Clock Pulse Signal
78 OUTPUT SCL0 I2C Bus Serial Clock 0
81 OUTPUT 140V_SW +B On-Off
PIN NUMBER TYPE CONTROL FUNCTION DESCRIPTION
71 I/O SDA1 I2C Serial Data Bus 1
80 I/O SDA0 I2C Serial Data Bus 0
PIN NUMBER CONTROL FUNCTION DESCRIPTION
32 AVDD ANALOG VOLTAGE SUPPLY
37 VSS GROUND REFERENCE
41 VPP VOLTAGE SUPPLY
74 VSS GROUND REFERENCE
77 VDD VOLTAGE SUPPLY
DX4P TG -9-
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