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                                            XEROX
                                PALO ALTO RESEARCH CENTER
                                    Computer Science Laboratory
                               April, 1973 - CSL Archieve # 3AL-038
                                      retyped November 7, 1978


To:                 Alto Group

From:               C. Thacker
Subject:            Alto Interfaces


This memo is in response to the request for a description of the Alto I/O system. Familiarity
with the Alto is assumed 1 .                     .

There are two basic ways in which I/O devices may be connected to the Alto. A device may
appear to a program as one or more memory locations in the range 177000-177777, in which
case it responds to addresses from MAR, for its selection, and transfers data on the memory
data bus, MD(00)'-MD(15)'. Alternatively, a device may connect directly to the processor bus,
and be selected by task-specific F1 or F2 signals. The latter interface will usually have its
own task microcode, and will be used only for high speed devices (> 1K words/sec). The
memory bus interface will usually be used for slow peripherals which can be driven by a
"Nova" program, although nothing prohibits mixing the interface methods, i.e., a memory
bus device can have its own microcode task.

Memory Bus

      The memory bus signals are:

           MD(OO)'

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