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                                                                                STL35NF10
                                N-CHANNEL 100V - 0.025 - 35A PowerFLATTM
                                   LOW GATE CHARGE STripFETTM MOSFET
                                                                                       PRELIMINARY DATA

             TYPE             VDSS         RDS(on)       ID

    STL35NF10                 100 V      < 0.030         35 A
s    TYPICAL RDS(on) = 0.025
s    IMPROVED DIE-TO-FOOTPRINT RATIO
s    VERY LOW PROFILE PACKAGE



DESCRIPTION                                                           PowerFLATTM(6x5)
This Power MOSFET is the second generation of                        (Chip Scale Package)
STMicroelectronics unique "STripFETTM" technolo-
gy. The resulting transistor shows extremely low on-
resistance and minimal gate charge. The new Pow-
erFLATTM package allows a significant reduction in
board space without compromising performance.                   INTERNAL SCHEMATIC DIAGRAM



APPLICATIONS
s HIGH EFFICIENCY ISOLATED DC/DC

  CONVETERS




ABSOLUTE MAXIMUM RATINGS
     Symbol                                  Parameter                      Value                        Unit
       VDS          Drain-source Voltage (VGS = 0)                            100                          V
      VDGR          Drain-gate Voltage (RGS = 20 k)                           100                          V
       VGS          Gate- source Voltage                                     

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