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DISCRETE SEMICONDUCTORS
DATA SHEET
handbook, halfpage
MBD128
BF1205
Dual N-channel dual gate
MOS-FET
Product specification 2003 Sep 30
NXP Semiconductors Product specification
Dual N-channel dual gate MOS-FET BF1205
FEATURES PINNING - SOT363
Two low noise gain controlled amplifiers in a single PIN DESCRIPTION
package. One with a fully integrated bias and one with a
1 gate 1 (a)
partly integrated bias
2 gate 2
Internal switch reduces the number of external
components 3 gate 1 (b)
Superior cross-modulation performance during AGC 4 drain (b)
High forward transfer admittance 5 source
High forward transfer admittance to input capacitance 6 drain (a)
ratio.
APPLICATIONS
handbook, halfpage d (a) s d (b)
Gain controlled low noise amplifiers for VHF and UHF
applications with 5 V supply voltage, such as digital and 6 5 4
analog television tuners and professional
communications equipment.
AMP AMP
a b
DESCRIPTION
The BF1205 is a combination of two equal dual gate 1 2 3
MOS-FET amplifiers with shared source and gate 2 leads Top view g1 (a) g2 g1 (b)
and an integrated switch. The integrated switch is MGX429
operated by the gate 1 bias of amplifier b. The source and
substrate are interconnected. Internal bias circuits enable
DC stabilization and a very good cross-modulation Marking code: L4-.
performance during AGC. Integrated diodes between the
gates and source protect against excessive input voltage Fig.1 Simplified outline and symbol.
surges. The transistor is encapsulated in SOT363
micro-miniature plastic package.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME DESCRIPTION VERSION
BF1205 Plastic surface mounted package; 6 leads SOT363
2003 Sep 30 2
NXP Semiconductors Product specification
Dual N-channel dual gate MOS-FET BF1205
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Per MOS-FET; unless otherwise specified
VDS drain-source voltage 10 V
ID drain current (DC) 30 mA
Ptot total power dissipation Ts 102 C; temperature at the 200 mW
soldering point of the source lead
yfs forward transfer admittance ID = 12 mA 26 31 40 mS
Cig1-ss input capacitance at gate 1 amp. a: f = 1 MHz 1.8 2.3 pF
amp. b: f = 1 MHz 2.0 2.5 pF
Crss reverse transfer capacitance f = 1 MHz 20 fF
NF noise figure amp. a: f = 800 MHz 1.2 1.9 dB
amp. b: f = 800 MHz 1.4 2.1 dB
Xmod cross-modulation amp. a: input level for k = 1% at 98 102 dBV
40 dB AGC
amp. b: input level for k = 1% at 100 105 dBV
40 dB AGC
Tj junction temperature 150 C
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Per MOS-FET; unless otherwise specified
VDS drain-source voltage 10 V
ID drain current (DC) 30 mA
IG1 gate 1 current 10 mA
IG2 gate 2 current 10 mA
Ptot total power dissipation Ts 102 C; note 200 mW
Tstg storage temperature 65 +150 C
Tj junction temperature 150 C
Note
1. Ts is the temperature at the soldering point of the source lead.
THERMAL CHARACTERISTICS
SYMBOL PARAMETER VALUE UNIT
Rth j-s thermal resistance from junction to soldering point 240 K/W
2003 Sep 30 3
NXP Semiconductors Product specification
Dual N-channel dual gate MOS-FET BF1205
MGS359
250
handbook, halfpage
Ptot
(mW)
200
150
100
50
0
0 50 100 150 200
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