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                 BF1218
                 Dual N-channel dual gate MOSFET
                 Rev. 01 -- 14 April 2010                                               Product data sheet




1. Product profile

          1.1 General description
              The BF1218 is a combination of two dual gate MOSFET amplifiers with shared source
              and gate2 leads and an integrated switch. The integrated switch is operated by the gate1
              bias of amplifier B.

              The source and substrate are interconnected. Internal bias circuits enable DC stabilization
              and a very good cross modulation performance during Automatic Gain Control (AGC).
              Integrated diodes between the gates and source protect against excessive input voltage
              surges. The transistor has a SOT363 micro-miniature plastic package.

CAUTION
                   This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
                   during transport and handling.




          1.2 Features and benefits
               Two low noise gain controlled amplifiers in a single package. One with a fully
               integrated bias and one with a partly integrated bias
               Internal switch to save external components
               Superior cross modulation performance during AGC
               High forward transfer admittance
               High forward transfer admittance to input capacitance ratio

          1.3 Applications
               Gain controlled low noise amplifiers for VHF and UHF applications with 5 V supply
               voltage
                 digital and analog television tuners
                 professional communication equipment
NXP Semiconductors                                                                                                                                     BF1218
                                                                                                                           Dual N-channel dual gate MOSFET


                     1.4 Quick reference data
                         Table 1. Quick reference data
                         Per MOSFET unless otherwise specified.
                         Symbol Parameter                                                Conditions                                      Min       Typ         Max Unit
                         VDS           drain-source voltage                              DC                                              -         -           6          V
                         ID            drain current                                     DC                                              -         -           30         mA
                         Ptot          total power dissipation                           Tsp  109 C                                [1]   -         -           180        mW
                         yfs           forward transfer admittance                       f = 100 MHz; Tj = 25 C
                                                                                              amplifier A; ID = 19 mA                    26        31          41         mS
                                                                                              amplifier B; ID = 15 mA                    25        30          40         mS
                         Ciss(G1)      input capacitance at gate1                        f = 100 MHz
                                                                                              amplifier A                          [2]   -         2.1         2.6        pF
                                                                                              amplifier B                          [2]   -         2.1         2.6        pF
                         Crss          reverse transfer capacitance f = 100 MHz                                                    [2]   -         20          -          fF
                         NF            noise figure                                      YS = YS(opt)
                                                                                              amplifier A; f = 400 MHz                   -         0.9         1.5        dB
                                                                                              amplifier B; f = 800 MHz                   -         1.4         2.0        dB
                         Xmod          cross modulation                                  input level for k = 1 %;
                                                                                         fw = 50 MHz;
                                                                                         funw = 60 MHz
                                                                                         at 40 dB AGC
                                                                                              amplifier A                          [3]   102       105         -          dBV
                                                                                              amplifier B                          [4]   102       105         -          dBV
                         Tj            junction temperature                                                                              -         -           150        C

                         [1]    Tsp is the temperature at the soldering point of the source lead.
                         [2]    Calculated from S-parameters.
                         [3]    Measured in Figure 33 test circuit.
                         [4]    Measured in Figure 34 test circuit.


2. Pinning information
                         Table 2.       Discrete pinning
                         Pin                Description                                              Simplified outline            Graphic symbol
                         1                  gate1 (AMP A)
                                                                                                                    6      5   4
                         2                  gate2                                                                                                      AMP A
                         3                  gate1 (AMP B)                                                                                G1A                             DA

                         4                  drain (AMP B)
                         5                  source                                                                  1      2   3             G2                          S

                         6                  drain (AMP A)


                                                                                                                                         G1B                             DB

                                                                                                                                                     AMP B
                                                                                                                                                         sym089



BF1218_1                                      All information provided in this document is subject to legal disclaimers.                          



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