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                    BLF7G20L-250P;
                    BLF7G20LS-250P
                    Power LDMOS transistor
                    Rev. 3 -- 1 March 2011                                                    Product data sheet




1. Product profile

          1.1 General description
              250 W LDMOS power transistor for base station applications at frequencies from
              1805 MHz to 1880 MHz.

              Table 1.    Typical performance
              Typical RF performance at Tcase = 25 C in a common source class-AB production test circuit.
              Mode of operation              f                    IDq       VDS    PL(AV)     Gp          D     ACPR
                                             (MHz)                (mA)      (V)    (W)        (dB)        (%)   (dBc)
              2-carrier W-CDMA               1805 to 1880         1900      28     70         18          35    29.5[1]

              [1]   Test signal: 3GPP; test model 1;64 DPCH; PAR = 8.4 dB at 0.01% probability on CCDF.


          1.2 Features and benefits
                    Excellent ruggedness
                    High-efficiency
                    Low Rth providing excellent thermal stability
                    Designed for broadband operation (1805 MHz to 1880 MHz)
                    Lower output capacitance for improved performance in Doherty applications
                    Designed for low memory effects providing excellent digital pre-distortion capability
                    Internally matched for ease of use
                    Integrated ESD protection
                    Compliant to Restriction of Hazardous Substances (RoHS) Directive 2002/95/EC

          1.3 Applications
               RF power amplifiers for W-CDMA base stations and multicarrier applications in the
               1805 MHz to 1880 MHz frequency range
NXP Semiconductors                             BLF7G20L-250P; BLF7G20LS-250P
                                                                                                                                     Power LDMOS transistor



2. Pinning information
                            Table 2.       Pinning
                            Pin               Description                                                            Simplified outline       Graphic symbol
                            BLF7G20L-250P (SOT539A)
                            1                 drain1
                                                                                                                             1   2                                1
                            2                 drain2
                                                                                                                                          5
                            3                 gate1
                                                                                                                                                       3
                            4                 gate2                                                                          3   4                                         5
                                                                                                                                                       4
                            5                 source                                                           [1]


                                                                                                                                                                  2
                                                                                                                                                                   sym117


                            BLF7G20LS-250P (SOT539B)
                            1                 drain1
                                                                                                                                                                  1
                            2                 drain2                                                                         1   2

                            3                 gate1                                                                                   5
                                                                                                                                                       3
                            4                 gate2                                                                          3   4                                         5
                                                                                                                                                       4
                            5                 source                                                           [1]


                                                                                                                                                                  2
                                                                                                                                                                   sym117


                            [1]    Connected to flange.


3. Ordering information
                            Table 3.       Ordering information
                            Type number                 Package
                                                        Name Description                                                                                          Version
                            BLF7G20L-250P               -              flanged balanced LDMOST ceramic package;                                                   SOT539A
                                                                       2 mounting holes; 4 leads
                            BLF7G20LS-250P              -              earless flanged balanced LDMOST ceramic package;                                           SOT539B
                                                                       4 leads


4. Limiting values
                            Table 4.   Limiting values
                            In accordance with the Absolute Maximum Rating System (IEC 60134).
                            Symbol          Parameter                                       Conditions                                        Min            Max            Unit
                            VDS             drain-source voltage                                                                              -              65             V
                            VGS             gate-source voltage                                                                               0.5            +13            V
                            ID              drain current                                                                                     -              65             A
                            Tstg            storage temperature                                                                               65             +150           C
                            Tj              junction temperature                                                                              -              200            C


BLF7G20L-250P_7G20LS-250P                       All information provided in this document is subject to legal disclaimers.                        



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