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phu78nq03lt_phd78nq03lt


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                                 PHU/PHD78NQ03LT
                                 N-channel TrenchMOS logic level FET
                                 Rev. 05 -- 27 July 2005                                        Product data sheet




1. Product profile

                     1.1 General description
                             Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
                             package using TrenchMOS technology.

                     1.2 Features
                             s Logic level threshold                            s Fast switching


                     1.3 Applications
                             s Computer motherboards                            s DC-to-DC converters


                     1.4 Quick reference data
                             s VDS  25 V                                        s ID  75 A
                             s RDSon  9 m                                       s QGD = 4 nC (typ)


2. Pinning information
Table 1:      Pinning
Pin Description                          Simplified outline                                                Symbol
1      gate (G)
                                                          mb                               mb                         D
2      drain (D)                   [1]

3      source (S)
                                                                                                             G
mb     mounting base;
       connected to drain                                                                                    mbb076   S
                                                                                           2
                                                                                       1        3


                                                      1   2    3

                                                  SOT533 (IPAK)                    SOT428 (DPAK)

[1]   It is not possible to make a connection to pin 2 of the SOT428 package.
Philips Semiconductors                                                               PHU/PHD78NQ03LT
                                                                                        N-channel TrenchMOS logic level FET



3. Ordering information
Table 2:          Ordering information
Type number                 Package
                            Name           Description                                                                                      Version
PHU78NQ03LT                 IPAK           plastic single-ended package; 3 leads (in-line)                                                  SOT533
PHD78NQ03LT                 DPAK           plastic single-ended surface mounted package; 3 leads (one lead cropped) SOT428


4. Limiting values
Table 3:   Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter                                       Conditions                                                 Min                Max                Unit
VDS              drain-source voltage                  25 



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