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>> Download phw7n60_1 documenatation <<Text preview - extract from the documentPhilips Semiconductors Product specification
PowerMOS transistor PHW7N60
GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT
field-effect power transistor in a
plastic envelope featuring high VDS Drain-source voltage 600 V
avalanche energy capability, stable ID Drain current (DC) 7 A
off-state characteristics, fast Ptot Total power dissipation 147 W
switching and high thermal cycling RDS(ON) Drain-source on-state resistance 1.2
performance with low thermal
resistance. Intended for use in
Switched Mode Power Supplies
(SMPS), motor control circuits and
general purpose switching
applications.
PINNING - SOT429 (TO247) PIN CONFIGURATION SYMBOL
PIN DESCRIPTION d
1 gate
2 drain
g
3 source
tab drain 1 2 3
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
ID Continuous drain current Tmb = 25
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