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Vishay Siliconix
Monolithic N-Channel JFET Duals
PRODUCT SUMMARY
Part Number VGS(off) (V) V(BR)GSS Min (V) gfs Min (mS) IG Max (pA) jVGS1 - VGS2j Max (mV)
U421 -0.4 to-2 -40 0.3 -0.25 10
U423 -0.4 to -2 -40 0.3 -0.25 25
FEATURES BENEFITS APPLICATIONS
D Monolithic Design D Tight Differential Match vs. Current D Ultralow Input Current
D High Slew Rate D Improved Op Amp Speed, Settling Time Accuracy Differential Amps
D Low Offset/Drift Voltage D Minimum Input Error/Trimming Requirement D High-Speed Comparators
D Low Gate Leakage: 0.2 pA D Insignificant Signal Loss/Error Voltage D Impedance Converters
D Low Noise D High System Sensitivity
D High CMRR: 102 dB D Minimum Error with Large Input Signals
DESCRIPTION
The U421/423 are monolithic dual n-channel JFETs designed The hermetic TO-78 package is available with full military
to provide very high input impedance for differential processing (see Military Information).
amplification and impedance matching. Among its many
unique features, this series offers operating gate current For similar products see the low-noise U/SST401 series and
specified at - 250 fA. high-gain 2N5911/5912 data sheets.
TO-78
S1 G2
1 7
D1 D2
2 6
3 5
G1 4 S2
Case, Substrate
Top View
ABSOLUTE MAXIMUM RATINGS
Gate-Drain, Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 V Power Dissipation : Per Sidea . . . . . . . . . . . . . . . . . . . . . . . . 300 mW
Gate-Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "40 V Totalb . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA
Lead Temperature (1/16" from case for 10 sec.) . . . . . . . . . . . . . . . . . . 300 _C Notes
a. Derate 2.4 mW/_C above 25_C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 200_C
b. Derate 4 mW/_C above 25_C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -55 to 150_C
Document Number: 70248 www.vishay.com
S-03180--Rev. D, 17-Feb-03 7-1
U421/423
Vishay Siliconix
SPECIFICATIONS (TA = 25_C UNLESS OTHERWISE NOTED)
Limits
U421 U423
Parameter Symbol Specific Test Conditions Typa Min Max Min Max Unit
Static
Gate-Source
V(BR)GSS IG = -1 mA, VDS = 0 V -60 -40 -40
Breakdown Voltage
Gate-Gate
V(BR)G1 - G2 IG = "1 mA, ID = 0, IS = 0 "55 "40 "40 V
Breakdown Voltage
Gate-Source
VGS(off) VDS = 10 V, ID = 1 nA -1.2 -0.4 -2 -0.4 -2
Cutoff Voltage
Saturation Drain Current IDSS VDS = 10 V, VGS = 0 V 400 60 1000 60 1000 mA
VGS = -20 V, VDS = 0 V -0.6 -1 -1 pA
Gate Reverse Current IGSS
TA = 125_C -0.3 -1 -1 nA
VDG = 10 V, ID = 30 mA -0.2 -0.25 -0.25
Gate Operating Current IG pA
TA = 125_C -150 -250 -250
Drain-Source
rDS(on) VGS = 0 V, ID = 10 mA 2000 W
On-Resistance
Gate-Source Voltage VGS VDG = 10 V, ID = 30 mA -0.8 -1.8 -1.8
Gate-Source V
VGS(F) IG = 1 mA , VDS = 0 V 0.7
Forward Voltage
Dynamic
Common-Source Forward
gfs 0.6 0.3 1.5 0.3 1.5 mS
Transconductance
VDS = 10 V, VGS = 0 V f = 1 kHz
V V,
Common-Source
gos 4 10 10 mS
Output Conductance
Common-Source Forward
gfs 0.2 0.12 0.35 0.12 0.35 mS
Transconductance
VDS = 10 V ID = 30 mA , f = 1 kHz
V,
Common-Source
gos 0.4 3 3 mS
Output Conductance
Common-Source
Ciss 1.4 3 3
Input Capacitance
Common-Source VDS = 10 V, VGS = 0 V, f = 1 MHz pF
Reverse Transfer Crss 0.7 1.5 1.5
Capacitance
Equivalent Input nV/
en VDS = 10 V, ID = 30 mA , f = 10 Hz 30 70 70
Noise Voltage Hz
Noise Figure NF RG = 10 MW 1 1 dB
Matching
Differential
V GS1
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