Service Manuals, User Guides, Schematic Diagrams or docs for : . Electronic Components Datasheets Various datasheets 74ls73
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SN54/74LS73A
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs. These
dual flip-flops are designed so that when the clock goes HIGH, the inputs are
enabled and data will be accepted. The logic level of the J and K inputs may DUAL JK NEGATIVE
be allowed to change when the clock pulse is HIGH and the bistable will per- EDGE-TRIGGERED FLIP-FLOP
form according to the truth table as long as minimum set-up times are ob-
served. Input data is transferred to the outputs on the negative-going edge of LOW POWER SCHOTTKY
the clock pulse.
LOGIC DIAGRAM (Each Flip-Flop) J SUFFIX
CERAMIC
CASE 632-08
14
1
Q Q
13 (8) 12 (9)
N SUFFIX
CLEAR PLASTIC
2 (6)
K 14 CASE 646-06
J
3 (10) 14 (7) 1
1 (15)
CLOCK (CP)
D SUFFIX
SOIC
14
1 CASE 751A-02
ORDERING INFORMATION
SN54LSXXJ Ceramic
SN74LSXXN Plastic
SN74LSXXD SOIC
MODE SELECT -- TRUTH TABLE
INPUTS OUTPUTS
OPERATING MODE
CD J K Q Q
LOGIC SYMBOL
Reset (Clear) L X X L H
Toggle H h h q q
Load "0" (Reset) H l h L H
Load "1" (Set) H h l H L 14 J Q 12 7 J Q 9
Hold H l l q q
1 CP 5 CP
H, h = HIGH Voltage Level
L, I = LOW Voltage Level
3 K C Q 13 10 K C Q 8
X = Don't Care D D
l, h (q) = Lower case letters indicate the state of the referenced input (or output) one set-up time
l, h (q) = prior to the HIGH to LOW clock transition. 2 6
VCC = PIN 4
GND = PIN 11
FAST AND LS TTL DATA
5-1
SN54/74LS73A
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
VCC Supply Voltage 54 4.5 5.0 5.5 V
74 4.75 5.0 5.25
TA Operating Ambient Temperature Range 54 ◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo