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D D
C
Aegis M/B C
B B
MS14-Additional
2010.12.10 A01 Build
A A
TITLE
INVENTEC
Aegis
SIZE CODE DOC.NUMBER REV
Friday, December 10, 2010 Custom ES CS-131 A01
DATE CHANGE NO. REV CHANGE by IEC DATE Friday, December 10, 2010 SHEET 1 of 61
5 4 3 2 1
8 7 6 5 4 3 2 1
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Schematic Page Description :
D D
01. Title 32. PCH (9/9)
02. Schematic Page DESCR 33. KBC
03. Block Diagram 34. CRT CONN
04. Power Block Diagram 35. LCD CONN
05. Annotations 36. HDMI CONN
06. PWR_Adaptor in/Charge 37. SATA HDD /ODD
07. PWR_3VA/5VA/3VLA/5VLA 38. New Card
08. PWR_1.5V/0.75V 39. Card Reader
09. PWR_0.85VS/1.05VS_VCCP 40. Audio Codec
C
10. PWR_CPU Core Power 41. Audio Jack
C
11. PWR_3VS/5VS/1.8VS 42. PWR OFF Charge
12. GPU Power-1 43. RJ45 I/F USB I/F
13. GPU Power-2 44. WLAN / BT
14. POWER SEQUENCE 45. PSW/LID/ TP
15. Processor(1/6) 46. LED / SCREW
16. Processor(2/6) 47. N12P-GV (1/5)
17. Processor(3/6) 48. N12P-GV (2/5)
18. Processor(4/6) 49. N12P-GV (3/5)
B 19. Processor(5/6) 50. N12P-GV (4/5) B
20. Processor(6/6) 51. N12P-GV (5/5)
21. Fan/Thermal 52. DDR3 VRAM
22. DDR3 DIMM0 53. USB Board Title
23. DDR3 DIMM1 54. RTL8111E-VL-CG
24. PCH (1/9) 55. USB Port
25. PCH (2/9) 56. SW Board Title
26. PCH (3/9) 57. SW_Board
27. PCH (4/9) 58. FP Board Title
A
28. PCH (5/9) 59. FP Board A
29. PCH (6/9) 60. GP Board Title
30. PCH (7/9) 61. GP Board
31. PCH (8/9) TITLE
INVENTEC
Aegis
schematics page DESCR
SIZE CODE DOC.NUMBER REV
C ES CS-131 A01
CHANGE by IEC DATE Friday, December 10, 2010 SHEET 2 of 61
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
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Aegis Block Diagram :
1067/1333 MT/S/1.5V
D D
HDMI P36
HDMI
VGA
Nvidia PEG X16
Sandy Bridge DDR 3 SO-DIMM 1 P22
LVDS N12P-GV (Socket-rPGA989)
CRT P34
P47~51 37.5mm x 37.5mm
900MHz DDR 3 SO-DIMM 2 P23
LVDS P35 DDRIII DDRIII P15~21 1067/1333 MT/S/1.5V
SDRAM SDRAM
128M X 16 128M X 16
FDI DMI
dGPU Power P12~13 DDRIII DDRIII
SDRAM SDRAM
CONN
CONN
CONN
CONN
USB 0
USB 1
USB 2
USB 3
128M X 16 128M X 16
C P52 USB C
RTL8111E PCI-E
GLAN I/F P43
PCH P42 NA P43 P43
WLAN+BT
Cougar Point
CardReader
NEW CARD
Webcam
PCI-E
USB 10
USB 11
USB 12
USB 5
USB 8
USB 9
RJ45 Minicard
WLAN
P44
BT
FP
USB
P43
25mm x 25mm
P39 P38 P35 P44 P45 P44
SATA
SATA
P24~32
HDA LPC PCH SPI
BATT CONN
B P6 B
SATA2 SATA0 SPI ROM-Nu
ODD P37 HDD P37
System Charge
4MB BIOS P24
DC /DC System Power P6
CPU Core Power P10
P41 SPKR
DDR PWR P8
P41 HP JACK ALC269Q-VB6-GR KBC
SPI ROM EC SPI 1.05VS_VCCP/0.85VS
P41 MIC JACK Audio Codec EC FW 4M ITE IT8518E P9
P33
P35 INT DMIC P40 P33 3VA/5VA/3VLA/5VLA P10
A PS2 A
3VS/5VS/1.8VS P11
Keyboard P33
Touchpad P45
Thermal meter
TI TMP431A TITLE
INVENTEC
P49 Aegis
Block Diagram
SIZE CODE DOC.NUMBER REV
C ES CS-131 A01
CHANGE by IEC DATE Friday, December 10, 2010 SHEET 3 of 61
8 7 6 5 4 3 2 1
5 4 3 2 1
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Power Block Diagram :
D D
VADPTR DCIN
R19 3VA 3VS
Adaptor AM4410NC 0.01 TPC6111
19V VIN VO
PM_SLP_S3#
AM4410NC
5VA 5VS
5VAUXON ENC TPC6111
+VBDC
TPS51123
PM_SLP_S3#
0.01 1.5V DIMM_VTT
CHARGER
C C
VIN VO G2997
PM_SLP_S4# EN 1.5VS_PWRGD
1.5VS
TPS51218 FDMC7692
BATT_CLK
BATT_DATA ACDET AC_OK
PM_SLP_S3#
BQ24725
1.05VS_VCCP
VIN VO
PM_SLP_S3# EN PAD20 PEG_1.05VS
TPS51219
B 3VA 1.8VS B
PEG_NVVDD
VIN VO
VIN VO
PM_SLP_S3# EN PM_SLP_S3# EN
G5694F11U TPS51217
VCORE_CPU
5VA 0.85VS(VCCSA)
VIN VO
VIN VO
ALL_SYS_PWRGD VR_ON
VCCP_PWRD EN
VR_SVID_DATA SDA
TPS51461 VR_SVID_CLK SCLK
A A
VR_SVID_ALRT# ALERT#
ISL95831 TITLE
INVENTEC
Aegis
Power Block Diagram
SIZE CODE DOC.NUMBER REV
C ES CS-131 A01
CHANGE by IEC DATE Friday, December 10, 2010 SHEET 4 of 61
5 4 3 2 1
8 7 6 5 4 3 2 1
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D
Net name Description : Board Stack up Description D
Voltage Rails PCB Layers
DCIN Primary DC system power supply Layer 1 Component Side, Microstrip signal Layer
3VLA 3.3V always on power rail by DCIN
5VLA 5.0V always on power rail by DCIN Layer 2 Ground Plane
3VLA_EC 3.3V always on power rail by 5VAUXON Layer 3 Stripline Layer
3VA 3.3V always on power rail by LATCH_ON
5VA 5.0V always on power rail by LATCH_ON Layer 4 Power Plane
5VACP 5.0V always on power rail by 5VAUXON Layer 5 Stripline Layer
1.5V 1.5V switched power rail by PM_SLP_S4# Layer 6 Stripline Layer
1.8V 1.8V power rail by PM_SLP_S4# Layer 7 Ground Plane
C
3VS 3.3V power rail by PM_SLP_S3# Layer 8 Solder Side,Microstrip signal Layer C
5VS 5.0V power rail by PM_SLP_S3#
1.5VS 1.5V power rail by PM_SLP_S3#
1.05VS_VCCP 1.05V power rail by PM_SLP_S3#
DIMM_VTT 0.75V DDR Termination Voltage by 1.5VS_PWRGD Differential Impedance for Microstrip(5-mils) Differential Impedance for Stripline(4-mils)
Host Clock 95 ohm +/- 20% 100 ohm +/- 20%
PCI-E Clock 95 ohm +/- 20% 100 ohm +/- 20%
DDR2 CLK 70 ohm +/- 20% 70 ohm +/- 20%
PEG_1.5VS 1.5V switched power rail for N12P-GV by PM_SLP_S3# DDR2 Strobe 85 ohm +/- 20% 90 ohm +/- 20%
PEG_1.05VS 1.05V switched power rail for N12P-GV by PM_SLP_S3# DMI Bus 95 ohm +/- 20% 100 ohm +/- 20%
PCIE Bus 95 ohm +/- 20% 100 ohm +/- 20%
PEG_NVVDD Variable switched power rail for N12P-GV by PM_SLP_S3# SDVO 95 ohm +/- 20% 100 ohm +/- 20%
SATA 95 ohm +/- 20% 100 ohm +/- 20%
USB 90 ohm +/- 20% 95 ohm +/- 20%
VCORE_CPU Core switched power rail for CPU by ALL_SYS_PWRGD LVDS 100 ohm +/- 20%
1.8VS 1.8V power rail by PM_SLP_S3# Lan 95 ohm +/- 20% 100 ohm +/- 20%
B Mother Board ID setting by EC B
Mother Board ID setting by PCH
Part Naming Conventions
FJ Mother Board ID setting by PCH FJ Mother Board ID setting by EC
C = Capacitor Q = Transistor Project EC_ID0
Project MB_ID2 MB_ID1 MB_ID0
CN = Connector R = Resistor
D = Diode RP = Resistor Pack 0 0 0
F = Fuse U = Arbitrary Logic Device Aegis (Discrete) 1
Aegis (Discrete) 0 0 1
L = Inductor Y = Crystal and Osc
Neurron (UMA) 0
Neurron (UMA) 0 1 0
Name Suffix Neuron-V (Optimus)
Neuron-V (Optimus) 1
0 1 1
# = Active Low signal Strike (UMA) 0
Strike (UMA) 1 0 0
NU = No Stuff
Strike-V (Optimus) 1
Strike-V (Optimus) 1 0 1
Silk (UMA) 0
Silk (UMA) 1 1 0
BAT54/BAT54A NXP_74LVC1G07GW
D BAT54C/BAT54S Silk-V (Optimus) 1 1 1
Silk-V (Optimus) 1
EC -----------> GPC0 ( pin 119)
3 3 PCH -----------> GPIO41 GPIO40 GPIO59
A A
N.C. 1 5 vcc Please pull up 10k for ''1''. Pull down 10k for ''0''
TR DIODE A 2
GND 3 4 Y
G 1 2 S 1 2
TITLE
INVENTEC
SOT-24 SOT-23 TSSOP_5P Aegis
Annotations
SIZE CODE DOC.NUMBER REV
C ES CS-131 A01
CHANGE by IEC DATE Friday, December 10, 2010 SHEET 5 of 61
8 7 6 5 4 3 2 1
5 4 3 2 1
AC-IN R15 R12
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11,21,7 5VLA
6 +VBDC
1
F2
2
L20 R5
1 2 1 2 1 2 LITTLEFUSE_R451015_15A_65V
1
CN3 NFE31PT222Z1E9L 360K_1%
1
1 F3 3.5A 715K_1% 102K_1% R6
C342
2 1 2 1 2 1000PF_50V
BATT
2
2 3 VADPTR 6 1 2 TH
3 4 33 BATTERY1_IN
8A_125V
4
3
4 C343
80.6K_1%
1
1
ACES_88334_047N_1_4P CN14
6012B0173202 C361 8
8
10pF_50V
1000PF_50V 7 G2
2
2
R8 1 2 33_5% 6 7 G G1
D D
33,6 BATT_CLK 1 2 33_5% 5 6 G
R7
33,6 BATT_DATA 4 5
3 4
2 3
1 2
1
1
1
1
D1 D2 D3 BATT 8P C144AM-108A8-L
EZJZ0V500AA-1 EZJZ0V500AA-1 EZJZ0V500AA-1 6012B0311301
2
2
2
R22 1 2 0_5%_OPEN
R20 1 2 0_5%_OPEN 10,12,13,21,35,7,8,9 DCIN
A01
R19 C352
Q2 Q7 Q54
8 D S 1 1 S D 8 1 2 8 D S 1 1 2
6 VADPTR
7 2 2 7 3 4 7 2
C 6 3 3 6 6 3 C
AX1 0.1uF_25V
1
1
5 4 4 5 5 4
C666 C344 G C355 G 0.01_1% G
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