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Product Specifications
17.0" SXGA Color TFT-LCD Smart Integration Module
Model Name: M170ES04
V.1
( ) Preliminary Specifications
( ) Final Specifications
(C) Copyright AU Optronics Corporation 1/24
August, 2001 All Rights Reserved. M170ES04 Ver 0.3
No Reproduction and Redistribution Allowed.
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i Contents
1.0 Handling Precautions
2.0 General Description
2.1 Display Characteristics
2.2 Functional Block Diagram
2.3 Optical Characteristics
2.4 Pixel format image
3.0 Electrical characteristics
3.1 Absolute Maximum Ratings
3.2 Connectors
3.3 Signal Pin
3.4 Signal Description
3.5 Signal Electrical Characteristics
3.6 Interface Timing
3.6.1 Timing Characteristics
3.6.2 Source and Gate Driver Timing Requirement
3.7 Power Consumption
3.8 Power ON/OFF Sequence
4.0 Backlight Characteristics
4.1 Signal for Lamp connector
4.2 Parameter guideline for CCFL Inverter
5.0 Vibration, shock and drop
5.1 Vibration and shock
5.2 Shock test
5.3 Drop test
6.0 Environment
6.1 Temperature and humidity
6.1.1 Operating conditions
6.1.2 Shipping conditions
6.2 Atmospheric pressure
6.3 Thermal shock
7.0 Reliability
7.1 Failure criteria
7.2 Failure rate
7.2.1 Usage
7.2.2 Components de-rating
7.3 CCFL life
7.4 ON/OFF cycle
8.0 Safety
8.1 Sharp edge requirement
8.2 Material
8.2.1 Toxicity
8.2.2 Flammability
8.3 Capacitors
8.4 Hazardous voltage
9.0 Other requirements
9.1 Smoke free design
9.2 National test lab requirement
10.0 Mechanical Characteristics
(C) Copyright AU Optronics Corporation 2/24
August, 2001 All Rights Reserved. M170ES04 Ver 0.3
No Reproduction and Redistribution Allowed.
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
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ii Record of Revision
Version and Date Page Old description New Description Remark
0.1. 2001/10/04 All First Edition for Customer All
Interface connector: Interface connector:
0.2. 2002/01/21 5,8 Change
JAE or compatible Hirose or compatible
0.3 2002/01/21 22 n.a Product label Add
0.4 2002/01/30 4 n.a. Weight: 2000g Add
1.0 Handling Precautions
1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration or spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure human earth when
handling.
7) Do not open nor modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) At the insertion or removal of the Signal Interface Connector, be sure not to rotate nor tilt the Interface
Connector of the TFT-LCD module.
10) After installation of the TFT-LCD module into an enclosure (LCD monitor housing, for example), do not
twist nor bend the TFT -LCD module even momentary. At designing the enclosure, it should be taken
into consideration that no bending/twisting forces are applied to the TFT -LCD module from outside.
Otherwise the TFT -LCD module may be damaged.
(C) Copyright AU Optronics Corporation 3/24
August, 2001 All Rights Reserved. M170ES04 Ver 0.3
No Reproduction and Redistribution Allowed.
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
Global LCD Panel Exchange Center www.panelook.com
2.0 General Description
This specification applies to the 17.0 inch Color TFT-LCD Integration Module M170ES04.
The display supports the SXGA (1280(H) x 1024(V)) screen format and 16.7M colors (RGB 8-bits data).
All input signals are TTL interface compatible.
This module does not contain an inverter card for backlight.
2.1 Display Characteristics
The following items are characteristics summary on the table under 25 condition:
ITEMS Unit SPECIFICATIONS
Screen Diagonal [mm] 432(17.0")
Active Area [mm] 337.920 (H) x 270.336(V)
Pixels H x V 1280(x3) x 1024
Pixel Pitch [mm] 0.264 (per one triad) x 0.264
Pixel Arrangement R.G.B. Vertical Stripe
Display Mode Normally White
2
White Luminance [cd/m ] 250 (Typ)
Contrast Ratio 400 : 1 (Typ)
Optical Response Time [msec] 40 (Typ)
Physical Size [mm] 383.5(W) x 306(H) x 20.0(D) (Typ)
Weight [g] 2000(Typ)
Electrical Interface Even-Even R/G/B data (8bits)
Even-Odd R/G/B data (8bits)
Odd-Even R/G/B data (8bits)
Odd-Odd R/G/B data (8bits),
15 timing control signal input
4 DC power input
Support Color 16.7M colors (RGB 8-bit data)
Temperature Range
o
Operating [ C] 0 to +50
o
Storage (Shipping) [ C] -20 to +60
(C) Copyright AU Optronics Corporation 4/24
August, 2001 All Rights Reserved. M170ES04 Ver 0.3
No Reproduction and Redistribution Allowed.
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
Global LCD Panel Exchange Center www.panelook.com
2.2 Functional Block Dia gram
The following diagram shows the functional block of the 17.0 inches Color TFT-LCD Smart Module:
X PCB
Hirose FH12-30S JST BHR-04VS-1
Hirose FH12-50S Mating Type SM04 (4.0) B-BHS -1-TB
2.3 Optical Characteristics
The optical characteristics are measured under stable conditions at 25 (Room Temperature):
Item Unit Conditions Min. Typ. Max.
Viewing Angle [degree] Horizontal (Right) 60/60 70/70 -
[degree] CR = 10 (Left) - -
[degree] Vertical (Up) 50 60 -
[degree] CR = 10 (Down) 55 65 -
[degree] Horizontal (Right) 70 80 -
[degree] CR = 5 (Left) - -
[degree] Vertical (Up) 70 80 -
[degree] CR = 5 (Down) - -
Contrast ratio 250 400 -
Normal Direction
Response Time [msec] Raising Time - 25 35-
[msec] Falling Time - 15 25-
[msec] Raising + Falling - 40 -
Color / Chromaticity Red x 0.59 0.62 0.65
Coordinates (CIE) Red y 0.3 0.33 0.36
Green x 0.27 0.30 0.33
Green y 0.57 0.60 0.63
Blue x 0.12 0.15 0.18
(C) Copyright AU Optronics Corporation 5/24
August, 2001 All Rights Reserved. M170ES04 Ver 0.3
No Reproduction and Redistribution Allowed.
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Blue y 0.07 0.10 0.13
Color Coordinates White x 0.28 0.31 0.34
(CIE) White
White y 0.3 0.33 0.36
Luminance Uniformity [%] 80 85 -
(Note 1)
White Luminance at [cd/m2] 200 250 -
CCFL 6.0mA(center
point)
Crosstalk ( in 75Hz) [%] 1.5
Note 1 Measure points & Diagram
Display Length distance
x = --------------
--------------
10
Display Width distance
y = --------------
--------------
10
Minimum Luminance in 5 Points (1-5)
Uniformity = --------------------
------------------
Maximum Luminance in 5 Points (1-5)
This panel is compatible with TCO99 approbation in luminance uniformity <1.7, luminance contrast >0.5
LCD Display area = 337.9 x 270.4 mm
W/10 1 2 W/10
5
3 4
W/10 W/10
L/10 L/10
(C) Copyright AU Optronics Corporation 6/24
August, 2001 All Rights Reserved. M170ES04 Ver 0.3
No Reproduction and Redistribution Allowed.
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
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2.4 Pixel format image
Following figure shows the relationship of the input signals and LCD pixel format.
1 2 1279 1280
1st Line R G B R G B R GB R G B
1024th R G B R G B R GB R G B
(C) Copyright AU Optronics Corporation 7/24
August, 2001 All Rights Reserved. M170ES04 Ver 0.3
No Reproduction and Redistribution Allowed.
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
Global LCD Panel Exchange Center www.panelook.com
3.0 Electrical characteristics
3.1 Absolute Maximum Ratings (GND=0V)
Absolute maximum ratings of the module is as following:
Item Symbol Min Max Unit Conditions
Supply Voltage (1) V33 -0.3 4.6 [Volt]
Supply Voltage (2) AVDD -0.3 15 [Volt]
Supply Voltage (3) YV1 -0.3 42 [Volt]
Supply Voltage (4) YVEE -16 0.3 [Volt]
YV1-YVEE -0.3 42 [Volt]
CCFL Inrush current ICFLL - 38 [mA] Note 1
CCFL Current ICFL - 7.6 [mA] rms
o
Operating Temperature TOP 0 +50 [ C] Note 2
Operating Humidity HOP 8 95 [%RH] Note 2
o
Storage Temperature TST -20 +60 [ C] Note 2
Storage Humidity HST 8 95 [%RH] Note 2
Note 1 : Duration=50 msec.
Note 2 : Maximum Wet-Bulb should be 39 and No condensation.
Note3 : Source -Driver IC : T6L64 , Gate-Driver IC : TMS57606
3.2 Connectors
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be will be following components.
J5
Connector Name / Designation Interface Connector / X-PCB card
Manufacture Hirose or compatible
Type Part Number FH12-30S
J6,J7
Connector Name / Designation Interface Connector / X-PCB card
Manufacture Hirose or compatible
Type Part Number FH12-50S
3.3 Signal Pin
J5 CONNECTOR
Pin# Signal Name Pin# Signal Name
1 XOEG6 2 XOEG5
3 XOEG4 4 XOEG3
5 XOEG2 6 XOEG1
7 XOEG0 8 GND
9 XOEB7 10 XOEB6
11 XOEB5 12 XOEB4
13 XOEB3 14 XOEB2
15 XOEB1 16 XOEB0
(C) Copyright AU Optronics Corporation 8/24
August, 2001 All Rights Reserved. M170ES04 Ver 0.3
No Reproduction and Redistribution Allowed.
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17 V33 18 V33
19 V33 20 AVDD
21 AVDD 22 AVDD
23 YV1 24 YVEE
25 GND 26 GATE-ON
27 YOE 28 YCLK
29 YDIO2 30 YDIO1
J6 CONNECTOR
Pin# Signal Name Pin# Signal Name
1 EPOL 2 ELOAD
3 EDO/I 4 GND
5 XECLK 6 GND
7 XEDINV 8 GND
9 XOOR7 10 XOOR6
11 XOOR5 12 XOOR4
13 XOOR3 14 XOOR2
15 XOOR1 16 XOOR0
17 XOOG7 18 XOOG6
19 XOOG5 20 XOOG4
21 XOOG3 22 XOOG2
23 XOOG1 24 XOOG0
25 GND 26 XOOB7
27 XOOB6 28 XOOB5
29 XOOB4 30 XOOB3
31 XOOB2 32 XOOB1
33 XOOB0 34 OPOL
35 OLOAD 36 ODO/I
37 GND 38 XOCLK
39 GND 40 XODINV
41 GND 42 XOER7
43 XOER6 44 XOER5
45 XOER4 46 XOER3
47 XOER2 48 XOER1
49 XOER0 50 XOEG7
J7 CONNECTOR
Pin# Signal Name Pin# Signal Name
1 XEOR7 2 XEOR6
3 XEOR5 4 XEOR4
5 XEOR3 6 XEOR2
7 XEOR1 8 XEOR0
9 XEOG7 10 XEOG6
11 XEOG5 12 XEOG4
13 XEOG3 14 XEOG2
15 XEOG1 16 XEOG0
17 GND 18 XEOB7
19 XEOB6 20 XEOB5
21 XEOB4 22 XEOB3
23 XEOB2 24 XEOB1
25 XEOB0 26 XEER7
(C) Copyright AU Optronics Corporation 9/24
August, 2001 All Rights Reserved. M170ES04 Ver 0.3
No Reproduction and Redistribution Allowed.
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
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27 XEER6 28 XEER5
29 XEER4 30 XEER3
31 XEER2 32 XEER1
33 XEER0 34 GND
35 XEEG7 36 XEEG6
37 XEEG5 38 XEEG4
39 XEEG3 40 XEEG2
41 XEEG1 42 XEEG0
43 XEEB7 44 XEEB6
45 XEEB5 46 XEEB4
47 XEEB3 48 XEEB2
49 XEEB1 50 XEEB0
3.4 Signal Description
J7 CONNECTOR
Pin Symbol Description Pin Symbol Description
No. No.
1 XEOR7 Red Data bit 7 (Even-Odd) 2 XEOR6 Red Data bit 6 (Even-Odd)
3 XEOR5 Red Data bit 5 (Even-Odd) 4 XEOR4 Red Data bit 4 (Even-Odd)
5 XEOR3 Red Data bit 3 (Even-Odd) 6 XEOR2 Red Data bit 2 (Even-Odd)
7 XEOR1 Red Data bit 1 (Even-Odd) 8 XEOR0 Red Data bit 0 (Even-Odd)
9 XEOG7 Green Data bit 7 (Even-Odd) 10 XEOG6 Green Data bit 6 (Even-Odd)
11 XEOG5 Green Data bit 5 (Even-Odd) 12 XEOG4 Green Data bit 4 (Even-Odd)
13 XEOG3 Green Data bit 3 (Even-Odd) 14 XEOG2 Green Data bit 2 (Even-Odd)
15 XEOG1 Green Data bit 1 (Even-Odd) 16 XEOG0 Green Data bit 0 (Even-Odd)
17 GND Ground 18 XEOB7 Blue Data bit 7 (Even-Odd)
19 XEOB6 Blue Data bit 6 (Even-Odd) 20 XEOB5 Blue Data bit 5 (Even-Odd)
21 XEOB4 Blue Data bit 4 (Even-Odd) 22 XEOB3 Blue Data bit 3 (Even-Odd)
23 XEOB2 Blue Data bit 2 (Even-Odd) 24 XEOB1 Blue Data bit 1 (Even-Odd)
25 XEOB0 Blue Data bit 0 (Even-Odd) 26 XEER7 Red Data bit 7 (Even-Even)
27 XEER6 Red Data bit 6 (Even-Even) 28 XEER5 Red Data bit 5 (Even-Even)
29 XEER4 Red Data bit 4 (Even-Even) 30 XEER3 Red Data bit 3 (Even-Even)
31 XEER2 Red Data bit 2 (Even-Even) 32 XEER1 Red Data bit 1 (Even-Even)
33 XEER0 Red Data bit 0 (Even-Even) 34 GND Ground
35 XEEG7 Green Data bit 7 (Eve n-Even) 36 XEEG6 Green Data bit 6 (Even-Even)
37 XEEG5 Green Data bit 5 (Even-Even) 38 XEEG4 Green Data bit 4 (Even-Even)
39 XEEG3 Green Data bit 3 (Even-Even) 40 XEEG2 Green Data bit 2 (Even-Even)
41 XEEG1 Green Data bit 1 (Even-Even) 42 XEEG0 Green Data bit 0 (Even-Even)
43 XEEB7 Blue Data bit 7 (Even-Even) 44 XEEB6 Blue Data bit 6 (Even-Even)
45 XEEB5 Blue Data bit 5 (Even-Even) 46 XEEB4 Blue Data bit 4 (Even-Even)
47 XEEB3 Blue Data bit 3 (Even-Even) 48 XEEB2 Blue Data bit 2 (Even-Even)
49 XEEB1 Blue Data bit 1 (Even-Even) 50 XEEB0 Blue Data bit 0 (Even-Even)
J6 CONNECTOR
Pin Symbol Description Pin Symbol Description
No. No.
1 EPOL Source driver output 2 ELOAD Source driver latch pulse
polarity control (Even) (Even)
(C) Copyright AU Optronics Corporation 10/24
August, 2001 All Rights Reserved. M170ES04 Ver 0.3
No Reproduction and Redistribution Allowed.
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3 EDO/I Horizontal Start Pulse (Even) 4 GND Ground
5 XECLK Pixel Clock Input (Even) 6 GND Ground
7 XEDINV Data Reverse 8 GND Ground
Control Signal (Even)
9 XOOR7 Red Data bit 7 (Odd-Odd) 10 XOOR6 Red Data bit 6 (Odd-Odd)
11 XOOR5 Red Data bit 5 (Odd-Odd) 12 XOOR4 Red Data bit 4 (Odd-Odd)
13 XOOR3 Red Data bit 3 (Odd-Odd) 14 XOOR2 Red Data bit 2 (Odd-Odd)
15 XOOR1 Red Data bit 1 (Odd-Odd) 16 XOOR0 Red Data bit 0 (Odd-Odd)
17 XOOG7 Green Data bit 7 (Odd-Odd) 18 XOOG6 Green Data bit 6 (Odd-Odd)
19 XOOG5 Green Data bit 5 (Odd-Odd) 20 XOOG4 Green Data bit 4 (Odd-Odd)
21 XOOG3 Green Data bit 3 (Odd-Odd) 22 XOOG2 Green Data bit 2 (Odd-Odd)
23 XOOG1 Green Data bit 1 (Odd-Odd) 24 XOOG0 Green Data bit 0 (Odd-Odd)
25 GND Ground 26 XOOB7 Blue Data bit 7 (Odd-Odd)
27 XOOB6 Blue Data bit 6 (Odd-Odd) 28 XOOB5 Blue Data bit 5 (Odd-Odd)
29 XOOB4 Blue Data bit 4 (Odd-Odd) 30 XOOB3 Blue Data bit 3 (Odd-Odd)
31 XOOB2 Blue Data bit 2 (Odd-Odd) 32 XOOB1 Blue Data bit 1 (Odd-Odd)
33 XOOB0 Blue Data bit 0 (Odd-Odd) 34 OPOL Source driver output
polarity control (Odd)
35 OLOAD Source driver latch pulse 36 ODO/I Horizontal Start Pulse (Odd)
(Odd)
37 GND Ground 38 XOCLK Pixel Clock Input (Odd)
39 GND Ground 40 XODINV Data Reverse
Control Signal (Odd)
41 GND Ground 42 XOER7 Red Data bit 7 (Odd-Even)
43 XOER6 Red Data bit 6 (Odd-Even) 44 XOER5 Red Data bit 5 (Odd-Even)
45 XOER4 Red Data bit 4 (Odd-Even) 46 XOER3 Red Data bit 3 (Odd-Even)
47 XOER2 Red Data bit 2 (Odd-Even) 48 XOER1 Red Data bit 1 (Odd-Even)
49 XOER0 Red Data bit 0 (Odd-Even) 50 XOEG7 Green Data bit 7(Odd-Even)
J5 CONNECTOR
Pin Symbol Description Pin Symbol Description
No. No.
1 XOEG6 Green Data bit 6 (Odd-Even) 2 XOEG5 Green Data bit 5 (Odd-Even)
3 XOEG4 Green Data bit 4 (Odd-Even) 4 XOEG3 Green Data bit 3 (Odd-Even)
5 XOEG2 Green Data bit 2 (Odd-Even) 6 XOEG1 Green Data bit 1 (Odd-Even)
7 XOEG0 Green Data bit 0 (Odd-Even) 8 GND Ground
9 XOEB7 Blue Data bit 7 (Odd-Even) 10 XOEB6 Blue Data bit 6 (Odd-Even)
11 XOEB5 Blue Data bit 5 (Odd-Even) 12 XOEB4 Blue Data bit 4 (Odd-Even)
13 XOEB3 Blue Data bit 3 (Odd-Even) 14 XOEB2 Blue Data bit 2 (Odd-Even)
15 XOEB1 Blue Data bit 1 (Odd-Even) 16 XOEB0 Blue Data bit 0 (Odd-Even)
17 V33 Digital Power Input 18 V33 Digital Power Input
(DC +3.3V) (DC +3.3V)
19 V33 Digital Power Input 20 AVDD Analog Power Input
(DC +3.3V) (DC +12.5V)
21 AVDD Analog Power Input 22 AVDD Analog Power Input
(DC +12.5V) (DC +12.5V)
23 YV1 Gate Driver High Voltage 24 YVEE Gate Driver Low Voltage Input
Input (DC +26.5V) (DC -6V)
25 GND Ground 26 GATE-ON Gate Driver Output
Enable Signal
27 YOE Gate Driver output 28 YCLK Gate Driver Pixel Clock Input
(C) Copyright AU Optronics Corporation 11/24
August, 2001 All Rights Reserved. M170ES04 Ver 0.3
No Reproduction and Redistribution Allowed.
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
Global LCD Panel Exchange Center www.panelook.com
Enable Signal
29 YDIO2 Vertical Start Pulse 2 30 YDIO1 Vertical Start Pulse 1
25 GND Ground 26 GATE-ON Gate Driver Output
Enable Signal
3.5 Signal Electrical Characteristic
It is recommended to refer the specifications of source driver(Toshiba:T6L64) and gate driver(TI:TMS57606)
in detail.
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