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                                                                                                       LD320EUN
                                                   Product Specification




                                            SPECIFICATION
                                                      FOR
                                                    APPROVAL



     (    ) Preliminary Specification
     (    ) Final Specification

                     Title                                  32.0" WUXGA TFT LCD

             BUYER                      General                      SUPPLIER          LG Display Co., Ltd.

             MODEL                                                    *MODEL           LD320EUN
                                                                      SUFFIX           SEM1 (RoHS Verified)
                                                                *When you obtain standard approval,
                                                                 please use the above model name without suffix


                                          SIGNATURE                                                SIGNATURE
                APPROVED BY
                                             DATE                                                     DATE

                          /




                          /




                          /


         Please return 1 copy for your confirmation with                     PD Product Design Dept.
                    your signature and comments.                               LG Display Co., Ltd



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                                                                                               LD320EUN
                                            Product Specification




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                                                                                               LD320EUN
                                            Product Specification




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                                                                                                                    LD320EUN
                                                         Product Specification

    1. General Description
    The LD320EUN is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
    b a c k l i g h t s y s t e m . T h e m a t r i x e mplo ys a-Si Th in Film Trans istor as the active e lem ent.
    It is a transmissive display type which is operating in the normally black mode. It has a 31.55 inch diagonally
    measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
    Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
    Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
    Therefore, it can present a palette of more than 16.7Milion colors. It has been designed to apply the 8-bit 2-port
    LVDS interface. It is intended to support Public Display where high brightness, super wide viewing angle, high
    color gamut,high color depth and fast response time are important.
                                                                     EPI(RGB)
       LVDS                               EEPROM
                                                                                               Source Driver Circuit
       2Port
                                         SCL      SDA                                 S1                               S1920
      LVDS
      Select               LVDS 1,2                                             G1

                                        Timing Controller
     OPC
     Enable
                            Option
                            signal
                                      LVDS Rx + OPC + DGA                              TFT - LCD Panel
                 CN1                       Integrated              Control                 (1920     RGB 1080 pixels)
                 (51pin)                                           Signals
                                                                                                   [Gate In Panel]
      ExtVBR-B              I2C                                               G1080

       +12.0V
                                          Power Circuit       Power Signals
    PWM_OUT CN2                              Block
      1~3   (8 pin)


                            PWM_OUT
                              1~3
              +24.0V, GND, On/Off           LED Driver


    General Features
                                        31.55 inches(801.31mm) diagonal


                                        0.36375 mm x 0.36375 mm
                                        1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
                                        8bit, 16.7Million colors
                                        400 cd/m2 (Center 1point ,Typ.)
                                        Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))




                                        Transmissive mode, Normally black
                                        Hard coating(3H), Anti-glare treatment of the front polarizer (Haze < 1%)



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                                                                                                                    LD320EUN
                                                   Product Specification


    2. Absolute Maximum Ratings
     The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
     to the LCD module.

    Table 1. ABSOLUTE MAXIMUM RATINGS




    Note 1. Ambient temperature condition (Ta = 25 r 2 C )
         2. Temperature and relative humidity range are shown in the figure below.
            Wet bulb temperature should be Max 39 C, and no condensation of water.
         3. Glass surface temperature can be guaranteed under 60 .




                                                                          90%

                                                                    60
                                                                                 60%

                                                               50                                       Storage
                                                                                     Humidity [(%)RH]




                              Wet Bulb
                              Temperature [   C]
                                                         40
                                                                                 40%
                                                                                                        Operation
                                                   30
                                          20
                                    10
                               0
                                                                                 10%


                        -20    0     10       20   30     40   50    60   70    80

                                     Dry Bulb Temperature [    C]

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                                                                                                      LD320EUN
                                               Product Specification




     It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
     backlight and LED Driver circuit.


    Table 2. ELECTRICAL CHARACTERISTICS




    Note 1. The specified current and power consumption are under the VLCD=12.0V, Ta=25 r 2 C, fV=60Hz
            condition, and mosaic pattern(8 x 6) is displayed and fV is the frame frequency.
         2. The current is specified at the maximum current pattern.
         3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
        4. ExtVBR-B signal have to input available duty range and sequence.
            After Driver ON signal is applied, ExtVBR-B should be sustained from 5% to 100% more than 500ms.
            After that, ExtVBR-B 1% and 100% is possible
            For more information, please see 3-6-2. Sequence for LED Driver.
        5. Ripple voltage level is recommended under 5% of typical voltage




                                                                                         White : 255 Gray
                                                                                         Black : 0 Gray




                                               Mosaic Pattern(8 x 6)
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                                                                                                       LD320EUN
                                               Product Specification
      Table 3. ELECTRICAL CHARACTERISTICS (Continue)




     Notes :
     1. Electrical characteristics are determined after the unit has been `ON' and stable for approximately 60
        minutes at 25 2 C. The specified current and power consumption are under the typical supply Input voltage
        24Vand VBR (ExtVBR-B : 100%), it is total power consumption.
     2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
        value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
        25 2 C.
     3. The duration of rush current is about 200ms. This duration is applied to LED on time.
     4. Even though inrush current is over the specified value, there is no problem if I2T spec of fuse is satisfied.




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                                                                                                                LD320EUN
                                                      Product Specification

    3-2. Interface Connections
    This LCD module employs two kinds of interface connection, 51-pin connector is used for the module
    electronics and 14-pin connector is used for the integral backlight system.
       3-2-1. LCD Module
      - LCD Connector(CN1): FI-R51S-HF(manufactured by JAE) or compatible
                              Refer to below and next Page table
      - Mating Connector : FI-R51HL(JAE) or compatible

    Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION
      No     Symbol                    Description               No    Symbol                     Description
      1           NC      No Connection (Note 4)                 27      NC       No Connection
      2           NC      No Connection (Note 4)                 28     R2AN      SECOND LVDS Receiver Signal (A-)
      3           NC      No Connection (Note 4)                 29      R2AP     SECOND LVDS Receiver Signal (A+)
      4           NC      No Connection (Note 4)                 30     R2BN      SECOND LVDS Receiver Signal (B-)
      5           NC      No Connection (Note 4)                 31      R2BP     SECOND LVDS Receiver Signal (B+)
      6           NC      No Connection (Note 4)                 32     R2CN      SECOND LVDS Receiver Signal (C-)
      7     LVDS Select   `H' =JEIDA , `L' or NC = VESA          33     R2CP      SECOND LVDS Receiver Signal (C+)
      8      ExtVBR-B     External PWM (from System)             34      GND      Ground
      9           NC      No Connection (Note 4)                 35    R2CLKN     SECOND LVDS Receiver Clock Signal(-)
      10    OPC Enable    `H' = Enable , `L' or NC = Disable     36    R2CLKP     SECOND LVDS Receiver Clock Signal(+)
      11          GND     Ground                                 37      GND      Ground
      12      R1AN        FIRST LVDS Receiver Signal (A-)        38     R2DN      SECOND LVDS Receiver Signal (D-)
      13      R1AP        FIRST LVDS Receiver Signal (A+)        39     R2DP      SECOND LVDS Receiver Signal (D+)
      14      R1BN        FIRST LVDS Receiver Signal (B-)        40      NC       No Connection
      15      R1BP        FIRST LVDS Receiver Signal (B+)        41      NC       No Connection
      16      R1CN        FIRST LVDS Receiver Signal (C-)        42   NC or GND   No Connection or Ground
      17      R1CP        FIRST LVDS Receiver Signal (C+)        43   NC or GND   No Connection or Ground
      18          GND     Ground                                 44     GND       Ground
      19     R1CLKN       FIRST LVDS Receiver Clock Signal(-)    45      GND      Ground
      20     R1CLKP       FIRST LVDS Receiver Clock Signal(+)    46     GND       Ground
      21      GND         Ground                                 47      NC       No connection
      22      R1DN        FIRST LVDS Receiver Signal (D-)        48     VLCD      Power Supply +12.0V
      23      R1DP        FIRST LVDS Receiver Signal (D+)        49     VLCD      Power Supply +12.0V
      24       NC         No Connection                          50     VLCD      Power Supply +12.0V
      25       NC         No Connection                          51     VLCD      Power Supply +12.0V
      26    NC or GND     No Connection or Ground                 -       -                             -


     Note    1. All GND(ground) pins should be connected together to the LCD module's metal frame.
             2. All VLCD (power input) pins should be connected together.
             3. All Input levels of LVDS signals are based on the EIA 644 Standard.
             4. #1~#6 & #9 NC (No Connection): These pins are used only for LGD (Do not connect)
             5. Specific pins(pin No. #10) are used for Scanning function of the LCD module.
                If not used, these pins are no connection. (Please see the Appendix VI for more information.)
             6. Specific pin No. #44 is used for "No signal detection" of system signal interface.
                It should be GND for NSB(No Signal Black) during the system interface signal is not.
                If this pin is "H", LCD Module displays AGP(Auto Generation Pattern).



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                                                                                               LD320EUN
                                                        Product Specification

    3-2-2. Backlight Module
        Master
       -LED Driver Connector
         : 20022WR - H14B2(Yeonho) or compatible
       - Mating Connector
         : 20022HS - 14B2 or compatible

     Table 5. LED DRIVER CONNECTOR PIN CONFIGURATION




                                                '

                                                '

     Notes :1. GND should be connected to the LCD module's metal frame.
            2. Normal : Low (under 0.7V) / Abnormal : Open
            3. Each impedance of pin #12 is over TBD [K ] .



                  Rear view of LCM                                              Status
                                                         PCB

                                                    1            14
                  1          14
                                                           ...
                       ...



                                     

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                                                                                                         LD320EUN
                                                Product Specification

    3-3. Signal Timing Specifications
    Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
    timings should be satisfied with the following specification for normal operation.

    Table 6. TIMING TABLE (DE Only Mode)




    Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
             If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.

          2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
             refresh rate and the horizontal frequency

            Timing should be set based on clock frequency.




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                                                                                                LD320EUN
                                               Product Specification

    3-4. LVDS Signal Specification
       3-4-1. LVDS Input Signal Timing Diagram


                        0.7VDD
       DE, Data
                                  0.3VDD


                        tCLK
                                     0.5 VDD

      DCLK


                                                       Valid data

      First data               Invalid data      Pixel 0,0    Pixel 2,0                   Invalid data


                                                       Valid data

      Second data              Invalid data      Pixel 1,0    Pixel 3,0                   Invalid data




                          DE(Data Enable)


                                                                          tHV

                                                      tHP


                                                        1                        1080

      DE(Data Enable)


                                                                           tVV



                                                        tVP




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                                                                                                                                                            LD320EUN
                                                                  Product Specification

    3-4-2. LVDS Input Signal Characteristics
      1) DC Specification
                          LVDS     -




                          LVDS     +



                                                                                                             V CM          V IN _ MAX   V IN _ MIN

                                       # V CM = {( LVDS +) + ( LVDS - )} /2
                              0V

                          Description                              Symbol                  Min        Max           Unit                             Note
      LVDS Common mode Voltage                                        VCM                   1.0        1.5           V                                -
      LVDS Input Voltage Range                                         VIN                  0.7        1.8           V                                -
      Change in common mode Voltage                                    VCM                             250          mV                                -
       2) AC Specification
                                                                                    Tclk


       LVDS Clock

                                                          A

      LVDS Data

                                                                   ( F clk = 1 /T clk )
                                            tSKEW tSKEW
                                                                                                                                                 A
                                                                    Tclk
      LVDS 1'st Clock                                                                                                                                       80%

      LVDS 2nd / 3rd / 4th Clock
                                                                                                                                                            20%
                                                                                                                                                      tRF
                              tSKEW_min tSKEW_max

                           Description                             Symbol                  Min        Max            Unit                            Note
                                           High Threshold              VTH                 100         600           mV
     LVDS Differential Voltage                                                                                                                         3
                                           Low Threshold               VTL                 -600       -100           mV
     LVDS Clock to Data Skew                                         tSKEW                  -     |(0.25*Tclk)/7|     ps                               -
     LVDS Clock/DATA Rising/Falling time                               tRF                 260    |(0.3*Tclk)/7|      ps                               2
     Effective time of LVDS                                             teff          | 360|             -            ps                               -
     LVDS Clock to Clock Skew (Even to Odd)                        tSKEW_EO                 -       |1/7* Tclk|       ps                               -
    Note 1. All Input levels of LVDS signals are based on the EIA 644 Standard.
         2. If tRF isn't enough, teff should be meet the range.
         3. LVDS Differential Voltage is defined within teff

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                                                                                                 LD320EUN
                                                 Product Specification




                               0.5tui                                    tui


     LVDS Data
                                  360ps




                                                VTH
        0V
   (Differential)                               VTL




                                               360ps

                                        teff

     LVDS CLK                                                                          tui : Unit Interval




        0V
   (Differential)




     * This accumulated waveform is tested with differential probe




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                                                                                                        LD320EUN
                                               Product Specification

    3-5. Color Data Reference

    The brightness of each primary color(red,green,blue) is based on the 8bit gray scale data input for the color.
    The higher binary input, the brighter the color. Table 7 provides a reference for color versus data input.


    Table 7. COLOR DATA REFERENCE




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                                                                                                                      LD320EUN
                                                   Product Specification

    3-6. Power Sequence
     3-6-1. LCD Driving circuit


                                               90%
                                                                                                           90%
   Power Supply For LCD
                     VLCD                   10%                                                              10%        10%
                                      0V
                                                                                                T8
                                              T1
                                                                                                                 T5
                                                         T2
                                                                         Valid Data                   Vcm : LVDS Common mode Voltage
                                                        30%
   Interface Signal (Tx_clock)        0V

                                                          100%      T3                  T4
                                                   T6
  User Control Signal
  (LVDS_select, OPC Enable, ExtVBR-B)

  Power for LED                                               T7          LED ON



    Table 8. POWER SEQUENCE




            1. Even though T1 is over the specified value, there is no problem if I2T spec of fuse is satisfied.
   Note :   2. If T2 is satisfied with specification after removing LVDS Cable, there is no problem.
            3. The T3 / T4 is recommended value, the case when failed to meet a minimum specification,
               abnormal display would be shown. There is no reliability problem.
            4. T5 should be measured after the Module has been fully discharged between power off and on period.
            5. If the on time of signals (Interface signal and user control signals) precedes the on time of Power (VLCD),
               it will be happened abnormal display. When T6 is NC status, T6 doesn't need to be measured.
            6. If there is no abnormal display, no problem.
            7. It is recommendation specification that T8 has to be 100ms as a minimum value.
                Please avoid floating state of interface signal at invalid period.
                When the power supply for LCD (VLCD) is off, be sure to pull down the valid and invalid data to 0V.

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                                                                                                           LD320EUN
                                                    Product Specification

     3-6-2. Sequence for LED Driver
        Power Supply For LED Driver



                                                            24V (typ.)
                                             90%                                   90%
                      VBL
                                       10%
                                  0V

                                               T1    T2                       T3

                    VON/OFF
                                                                  LED ON



                     ExtVBR-B


                                                      T4   T6




      3-6-3. Dip condition for LED Driver

                                                                   T5
                                                                                              VBL : 24V


              VBL(Typ.) x 0.8


                                                                                              0V

    Table 9. Power Sequence for LED Driver




    Notes : 1. T1 describes rising time of 0V to 24V and this parameter does not applied at restarting time.
                Even though T1 is over the specified value, there is no problem if I2T spec of fuse is satisfied.
            2. In T6 section, ExtVBR-B should be sustained from 5% to 100% .


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                                                                                                      LD320EUN
                                                 Product Specification
    4. Optical Specification
    Optical characteristics are determined after the unit has been `ON' and stable in a dark environment at 25 2 C.
    The values are specified at 50cm from the LCD surface at a viewing angle of ) and T equal to 0 .
    FIG. 1 shows additional information concerning the measurement equipment and method.

                                        LCD Module                                 Pritchard 880 or
             Optical Stage(x,y)
                                                                                   equivalent




                                                       50cm
                      FIG. 1 Optical Characteristic Measurement Equipment and Method


                                                                 Ta= 25 2 C, VLCD=12.0V, fV=60Hz, Dclk=74.25MHz,
     Table 10. OPTICAL CHARACTERISTICS                                                          EXTVBR-B =100%




                                             G




                                I                  T
                            I                      T
                            I                      T
                                    I              T




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                                                                                                        LD320EUN
                                               Product Specification
    Note : 1. Contrast Ratio(CR) is defined mathematically as :

                                  Surface Luminance with all white pixels
              Contrast Ratio =
                                  Surface Luminance with all black pixels
              It is measured at center 1-point.
           2. Surface luminance are determined after the unit has been `ON' and 1 Hour after lighting the
              backlight in a dark environment at 25 2 C. Surface luminance is the luminance value at center
              1-point across the LCD surface 50cm from the surface with all pixels displaying white.
              For more information see the FIG. 2.
           3. The variation in surface luminance , G WHITE is defined as :
             G WHITE(5P) = Maximum(Lon1,Lon2, Lon3, Lon4, Lon5) / Minimum(Lon1,Lon2, Lon3, Lon4, Lon5)
              Where Lon1 to Lon5 are the luminance with all pixels displaying white at 5 locations .
              For more information, see the FIG. 2.
           4. Response time is the time required for the display to transit from any gray to white (Rise Time, TrR)
              and from any gray to black (Decay time, TrD). For additional information see the FIG. 3.
                  G to GBW Spec stands for average value of all measured points.
                 Photo Detector : RD-80S / Field : 2
           5. Viewing angle is the angle at which the contrast ratio is greater than 10. The angles are
              determined for the horizontal or x axis and the vertical or y axis with respect to the z axis which
              is normal to the LCD module surface. For more information, see the FIG. 4.
           6. Gray scale specification
              Gamma Value is approximately 2.2. For more information, see the Table 11.




    Table 11. GRAY SCALE SPECIFICATION




       Ver. 0.1                                                                                              18 /37



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                                                                                                       LD320EUN
                                               Product Specification


    Measuring point for surface luminance & measuring point for luminance variation.



                                                      H
                                              A
                  V
                      B




                                                                                            A : H / 4 mm
                                                                                            B : V / 4 mm
                                                                                            @ H,V : Active Area




                                 FIG. 2 5 Points for Luminance Measure




     Response time is defined as the following figure and shall be measured by switching the input signal for
     "Gray(N)" and "Gray(M)".



                                                TrR                           TrD
                        100
                         90


                  Optical
                  Response


                          10
                                  Gray(N)              Gray(M)                Gray(N)
                           0
                                            N,M = Black~White, N


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