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NOTICES
1. The contents stated in this document and the product may be subject to
change without prior notice.
When you kindly study to use this product, please ask our distributor or us
for the latest information.
2. This product is developed and produced for usage onto normal electronic
products (office automation equipments, communication peripherals, electric
appliance products, game machines, etc.) and is not suitable for applications
which need extremely high reliability or extreme safety (aero- or space-use
machines, control equipments for nuclear power, life keeping equipments,
etc.).
3. This document shall not grant or guarantee any right to adapt intellectual
property or any other patents of third party.
4. Please use this product correctly according to operating conditions and
precautions for use stated in this document.
Please install safety proof in your designing to avoid human accident, fire
accident and social damage, which may be resulted from malfunction of this
product.
5. This product is not designed to withstand against radiant rays.
6. It is strictly prohibited to copy or publish a part or whole of this document
without our prior written approval.
REVISION HISTORY
DATE REVISION PAGE DESCRIPTIONS
NO.
Jul.8,04 Ver. 1 - Initial Release
Oct.22,04 Ver. 2 2 Weight:TBD->690 TYP.
Power Supply current:TBD->250
3 Color of CIE coordinate Rx,y;Gx,y;Bx,y:TBD->(xxx)
4 BACKLIGHT CHARACTERISTIC:TBD->xxx
8 DCLK fCLK:(41)->(50.8),DE fH(40)->(48.1),DE fV:(62)->(75)
Mar.29,04 Ver. 3 2,3,4,9,11 (xxx)->xxx
8 Add the INTERFACE (LVDS) SIGNAL TIMING PARAMETERS
9 Eliminate the Duty,tSI,tHP,tSD,tHD: (xxx)->xxx
11 POWER ON/OFF SEQUENCE REQUIREMENT
Add the VCM
Change the character: VIH -> VTH
Change the character: VIL -> VTL
SANYO EPSON IMAGING DEVICES
CORPORATION TM121SV A01 Ver.3 Page 1/16
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MECHANICAL CHARACTERISTICS
Ta=25 degC
ITEM SPECIFICATION UNIT
Module size 280.0(W) x 218.0(H) x 11.5 Typ.(t) mm
Resolution 800 x R G B(W) x 600(H) pixel
Sub pixel pitch 0.1025(W) x 0.3075(H) mm
Pixel pitch 0.3075(W) x 0.3075(H) mm
Active viewing area 246.0(W) x 184.5(H) mm
Bezel opening area 249.0(W) x 187.5(H) mm
Weight 690 TYP. g
ELECTRICAL ABSOLUTE MAXIMUM RATINGS
Ta=25 degC
ITEM SYMBOL MIN MAX UNIT NOTE
Power supply voltage VDD-VSS 0 4.0 V
Input voltage VI Vss-0.3 VDD+0.3 V
Lamp current IL - 8 mA
VHV - 2000 Vrms
Lamp supply voltage
VLGND - 100 Vrms
ENVIRONMENTAL ABSOLUTE MAXIMUM RATINGS
Ta=25 degC
ITEM SYMBOL CONDITIONS MIN MAX UNIT NOTE
Ambient TST Storage -20 60 degC Note 1
temperature TOP Operation 0 50
Humidity - Ta=40 degC max. - 85 %RH No condensation
Note 2
Vibration - Storage - 1.5 G Note 3
Shock - Storage - 50 G XYZ 11ms/direction
[Note 1] Care should be taken so that the LCD module may not be subjected to the
temperature beyond this specification.
[Note 2] Ta>40 degC : Absolute humidity shall be less than that of 85%RH/40 degC.
[Note 3] 10-200Hz, 30min/cycle, X/Y/Z each one cycle and except for resonant frequency.
ELECTRICAL CHARACTERISTICS
VDD=3.3V, fCLK=40MHz ,fH=38kHz, fV=60Hz, Ta=25 degC
ITEM SYMBOL CONDITIONS MIN TYP MAX UNIT NOTE
Power supply voltage VDD-VSS 3.0 3.3 3.6 V
LVDS input VTH High level - - +100
mV VCM=1.25V
Threshold voltage VTL Low level -100 - -
Common mode
VCM 1.125 1.25 1.375 V
voltage of LVDS input
LVDS input
RT - 100 - ohms Internal
Termination resistor
Power Supply current IDD Note 1 - 250 - mA
[Note 1] Under the following display image :
Typical Value: Display pattern is 64 gray scale bar.
[Note 2] VCM : Common mode voltage of LVDS input
SANYO EPSON IMAGING DEVICES
CORPORATION TM121SV A01 Ver.3 Page 2/16
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OPTICAL CHARACTERISTICS
Ta=25 degC, VDD=3.3V, fCLK=40MHz, fH=38kHz, fV=60Hz
ITEM SYMBOL CONDITIONS MIN TYP MAX UNIT NOTE
Note
Brightness B =0 deg. - 340 - cd/m2
5,7,8
Note
Brightness uniformity B =0 deg. - - 1.45 -
6,7,8
Note
Contrast ratio CR =0 deg. - 300 - -
2,4,8
= 0 deg. - 40 -
= 90 deg. - 50 - Note 1,2,
Viewing angle range CR>10 deg.
=180 deg. - 20 - 4,8
=270 deg. - 50 -
Response Rise tr - 30 - Note
=0 deg. ms.
time Fall tf - 20 - 3,4,8
x - 0.60 -
Red
y - 0.35 -
x - 0.32 -
Color of Green
y - 0.56 -
CIE =0 deg. - Note 4,8
x - 0.15 -
coordinate Blue
y - 0.13 -
x 0.31 0.34 0.37
White
y 0.32 0.35 0.38
=180deg. DATA Black White Black
100%
=90deg. B 90%
=270deg.
10%
0%
tr tf
=0deg.
[Note 1] and [Note 3] Response time
[Note 2] Contrast ratio "CR" is defined as :
Brightness at White
CR =
Brightness at Black
[Note 4] This shall be measured at center (point No.3 shown in Note 7).
[Note 5] The brightness shall be the average of five points.
[Note 6] The brightness uniformity " B" is defined as :
Maximum brightness of five points
B=
Minimum brightness of five points
SANYO EPSON IMAGING DEVICES
CORPORATION TM121SV A01 Ver.3 Page 3/16
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[Note 7] Measurement points
1/6Hp 1/2Hp 5/6Hp
Active area
1/6Vp 1 2
1/2Vp 3
5/6Vp 4 5
Vp: Total Number of Vertical pixel
Hp: Total Number of horizontal pixel
[Note 8] Measurement condition
(1) Measurement equipment: BM-5A (TOPCON Corp.), Field=2 degree
(2) Ambient temperature Ta: 25 +/- 2 degC
(3) LCD: All pixels are WHITE, VDD=3.3V, fCLK=40MHz, fH=38kHz, fV=60Hz
(4) Measure after 30 minutes of CFL warm up.
(5) IL=6.0mArms with the CFL inverter CXA-P1212-VJL (TDK).
BACKLIGHT CHARACTERISTICS
Ta=25 degC
ITEM SYM. CONDITIOS MIN TYP MAX UNIT NOTE
Lamp voltage VL - 510 - Vrms at IL=6.0mArms
Lamp current IL 3 - 8 mArms Recommended value
Operating frequency fL 40 - 65 kHz Recommended value
Start up voltage VS - - 1300 Vrms at Ta=0 degC
Lamp life tOL 50000 - - Hours at IL=6.0 mArms
[Note 1] Backlight driving conditions (operating frequency fL especially) may interfere
with horizontal frequency fH, causing the beat or flicker on the display.
Therefore the operating frequency fL shall be adjusted in relation to
horizontal frequency fH to avoid interference.
[Note 2] The inverter open voltage should be larger than start up voltage, otherwise backlight
may blinking for a moment after turns on or not be turned on. And this voltage
should be applied to lamp for more than 1 second to start up, otherwise backlight
may not be turned on.
[Note 3] If driving current waveform is asymmetrical, mercury deviation inside of CFL will
incline to one side and consequently abnormal lighting may occur.
To prevent such unfavorable lighting, driving current waveform is asked to have
unbalance rate of less than 10% and wave-height rate of less than 2 +/- 10%.
And this driving waveform shall be confirmed in your system.
Unbalance rate = | Ip - I-p | / IL x 100 (%)
Ip Wave-height rate = Ip (or I-p) / IL
Ip : High peak value
I-p I-p : Low peak value
IL : Effective value
Current waveform
[Note 4] The inverter of ground reference type should be used. The inverter of ground floating
type should not be used.
SANYO EPSON IMAGING DEVICES
CORPORATION TM121SV A01 Ver.3 Page 4/16
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BLOCK DIAGRAM
ASIC
(LVDS-Receiver)
Generator DATA
Timing
TFT
CN1
Source Driver
DE
Gate Driver 800 (RGB)
Converter
DC/DC
600
TFT Panel
VDD
VSS
Back Light
Vcom
FLCN1,2
2CFL
SANYO EPSON IMAGING DEVICES
CORPORATION TM121SV A01 Ver.3 Page 5/16
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INTERFACE PIN CONNECTIONS
LCM : CN1
PIN NO. SYMBOL FUNCTION
1 VDD Power Supply ( 3.3V normal)
2 VDD Power Supply ( 3.3V normal)
3 VSS Ground
4 VSS Ground
5 Rin0- Receiver Signal(-)
6 Rin0+ Receiver Signal(+)
7 VSS Ground
8 Rin1- Receiver Signal(-)
9 Rin1+ Receiver Signal(+)
10 VSS Ground
11 Rin2- Receiver Signal(-)
12 Rin2+ Receiver Signal(+)
13 VSS Ground
14 RCLK- Clock Signal(-)
15 RCLK+ Clock Signal(+)
16 VSS Ground
17 NC No Connection(Should be open during operation)
18 NC No Connection(Should be open during operation)
19 VSS Ground
20 NC No Connection(Should be open during operation)
CN1 : FI-SEB20P-HF10 (JAE)
Suitable mating connector: FI-S20S/FI-SE20M/FI-SE20MR(JAE)
[Note 1] Internal termination resistors of LVDS input lines are 100 ohms.
[Note 2] Valid synchronous signals are DCLK and DE. HSYNC and VSYNC are not used
Back Light : FLCN1,2
PIN NO. SYMBOL FUNCTION
1 H.V High voltage for CFL
2 N.C. No connection
3 LGND Low voltage for CFL
FLCN1,2 : BHR-03VS-1 (JST)
Suitable mating connector: SM02(8.0)B-BHS-1 (JST)
SANYO EPSON IMAGING DEVICES
CORPORATION TM121SV A01 Ver.3 Page 6/16
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INTERFACE (LVDS) DATA ASSIGNMENT
Rxout 6 Rxout 5 Rxout 4 Rxout 3 Rxout 2 Rxout 1 Rxout 0
Rin0 +/- GO(LSB) R5(MSB) R4 R3 R2 R1 R0(LSB)
Rxout13 Rxout12 Rxout11 Rxout10 Rxout 9 Rxout 8 Rxout 7
Rin1 +/- B1 B0(LSB) G5(MSB) G4 G3 G2 G1
Rxout20 Rxout19 Rxout18 Rxout17 Rxout16 Rxout15 Rxout14
Rin2 +/- DE VSYNC HSYNC B5(MSB) B4 B3 B2
RCLK +/-
INTERFACE SIGNALS
SYMBOL FUNCTION
DCLK Data Clock
HSYNC Horizontal Sync - This signal initiates a new line (negative).
VSYNC Vertical Sync - This signal initiates a new frame (negative).
DE Data Enable (positive)
R0 Red Data (LSB)
R1 Red Data
R2 Red Data
R3 Red Data
R4 Red Data
R5 Red Data (MSB)
G0 Green Data (LSB)
G1 Green Data
G2 Green Data
G3 Green Data
G4 Green Data
G5 Green Data (MSB)
B0 Blue Data (LSB)
B1 Blue Data
B2 Blue Data
B3 Blue Data
B4 Blue Data
B5 Blue Data (MSB)
[Note 1] The valid synchronous signals are DCLK and DE. HSYNC and VSYNC are invalid.
[Note 2] INTERFACE SIGNALS are loaded from LVDS-transmitter to TFT Timing generator
with LVDS sequence. (See BLOCK DIAGRAM.)
SANYO EPSON IMAGING DEVICES
CORPORATION TM121SV-A01 Ver.3 Page 7/16
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INTERFACE (LVDS) SIGNAL TIMING PARAMETERS
LVDS INPUT TIMING Ta=25 degC, VDD=3.3V, fCLK=40MHz
PARAMETER SYMBOL CONDITION MIN TYP MAX UNIT
Input Data Position 0 tRIP1 tCLK=25.0ns -0.9 0.0 0.9 ns
Input Data Position 1 tRIP0 tCLK=25.0ns tCLK/7-0.9 tCLK/7 tCLK /7+0.9 ns
Input Data Position 2 tRIP6 tCLK=25.0ns 2tCLK/7-0.9 2tCLK/7 2tCLK /7+0.9 ns
Input Data Position 3 tRIP5 tCLK=25.0ns 3tCLK/7-0.9 3tCLK/7 3tCLK /7+0.9 ns
Input Data Position 4 tRIP4 tCLK=25.0ns 4tCLK/7-0.9 4tCLK/7 4tCLK /7+0.9 ns
Input Data Position 5 tRIP3 tCLK=25.0ns 5tCLK/7-0.9 5tCLK/7 5tCLK /7+0.9 ns
Input Data Position 6 tRIP2 tCLK=25.0ns 6tCLK/7-0.9 6tCLK/7 6tCLK /7+0.9 ns
tRIP2
tRIP3
tRIP4
tRIP5
tRIP6
tRIP0
tRIP1
Rin x +/- RX2 RX1 RX0 RX6 RX5 RX4 RX3 RX2 RX1 RX0
LVDS Input Data
RCLK +/-
LVDS Input Clock tCLK
Figure 1 LVDS data-input-timing waveform diagram
JITTER TOLERANCE Ta=25 degC, VDD=3.3V, fCLK=40MHz
PARAMETER SYMBOL MIN TYP MAX UNIT
Simple cycle jitter tcj1 - - 300 ps
Clock-period change rate tcj2 - - 25 ps/cycle
*This is the value when tRIP0-6 is the typical value written in the LVDS INPUT TIMING.
The simple cycle jitter is ordinary cycle jitter. 25.4
Assuming that the period of a given clock cycle
n is represented by tCLK , for example , the 25.3
period of cycle n +1 may be tolerated up to
tCLK
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