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PRODUCT SPECIFICATIONS
AVC Liquid Crystal Displays Group
LK315T3LZ29
TFT-LCD Module
Spec. Issue Date: June 30, 2007
No: LD-15606C
RECORDS OF REVISION
MODEL No. : LK 315T3LZ29
SPEC No. : LD-17416
REVISED
DATE NO. PAGE SUMMARY NOTE
No.
2007.04.12 LD-17416 1st Issue
2007.09.28 LD-17416A A P12 Changed Timing characteristics 2nd Issue
1. Application
This specification applies to the color 31.5" Wide XGA TFT-LCD module LK315T3LZ29.
* These specification sheets are proprietary products of SHARP CORPORATION ("SHARP") and include materials
protected under copyright of SHARP. Do not reproduce or cause any third party to reproduce them in any form or by
any means, electronic or mechanical, for any purpose, in whole or in part, without the express written permission of
SHARP.
* In case of using the device for applications such as control and safety equipment for transportation (aircraft, trains,
automobiles, etc.), rescue and security equipment and various safety related equipment which require higher
reliability and safety, take into consideration that appropriate measures such as fail-safe functions and redundant
system design should be taken.
* Do not use the device for equipment that requires an extreme level of reliability, such as aerospace applications,
telecommunication equipment (trunk lines), nuclear power control equipment and medical or other equipment for
life support.
* SHARP assumes no responsibility for any damage resulting from the use of the device that does not comply with
the instructions and the precautions specified in these specification sheets.
* Contact and consult with a SHARP sales representative for any questions about this device.
2. Overview
This module is a color active matrix LCD module incorporating amorphous silicon TFT (Thin Film Transistor). It is
composed of a color TFT-LCD panel, driver ICs, control circuit, power supply circuit, inverter circuit and back light
system etc. Graphics and texts can be displayed on a 1920 RGB 1080 dots panel with 32,777,216 colors by
using LVDS (Low Voltage Differential Signaling) to interface, +5V of DC supply voltages.
This module also includes the DC/AC inverter to drive the CCFT. (+24V of DC supply voltage)
And in order to improve the response time of LCD, this module applies the Over Shoot driving (O/S driving)
technology for the control circuit .In the O/S driving technology, signals are being applied to the Liquid Crystal
according to a pre-fixed process as an image signal of the present frame when a difference is found between image
signal of the previous frame and that of the current frame after comparing them.
By using the captioned process, the image signals of this LCD module are being set so that image response can be
completed within one frame, as a result, image blur can be improved and clear image performance can be realized.
3. Mechanical Specifications
Parameter Specifications Unit
80.04 Diagonal cm
Display size
31.5 Diagonal inch
Active area 697.69 (H) x 392.26 (V) mm
1920 (H) x 1080 (V)
Pixel Format pixel
1pixel = R + G + B dot
Pixel pitch 0.51075(H) x 0.51075 (V) mm
Pixel configuration R, G, B vertical stripe
Display mode Normally black
Unit Outline Dimensions (*1) 780.0(W) x 450.0(H) x 51.0(D) mm
Mass 6.4 0.3 kg
Anti glare, low reflection coating
Surface treatment Hard coating: 2H
Haze: 23 +/- 5%
(*1) Outline dimensions are shown in Fig.1
4. Input Terminals
4-1. TFT panel driving
CN1 (Interface signals) (Shown in Fig.1-2)
Using connector : FI-RE41S-HF (Japan Aviation Electronics Ind. , Ltd.)
Mating connector : FI-RE41HL,FI-R41H (Japan Aviation Electronics Ind. , Ltd.)
Mating LVDS transmitter :THC63LVDM83R(THine) or equivalent device
Pin No. Symbol Function Remark
1 GND GND
2 AIN0- Aport (-)LVDS CH0 differential data input LVDS
3 AIN0+ Aport (+)LVDS CH0 differential data input LVDS
4 AIN1- Aport (-)LVDS CH1 differential data input LVDS
5 AIN1+ Aport (+)LVDS CH1 differential data input LVDS
6 AIN2- Aport (-)LVDS CH2 differential data input LVDS
7 AIN2+ Aport (+)LVDS CH2 differential data input LVDS
8 GND GND
9 ACK- Aport LVDS Clock signal(-) LVDS
10 ACK+ Aport LVDS Clock signal(+) LVDS
11 AIN3- Aport (-)LVDS CH3 differential data input LVDS
12 AIN3+ Aport (+)LVDS CH3 differential data input LVDS
13 NC It is required to set non-connection (OPEN)
14 NC It is required to set non-connection (OPEN)
15 GND GND
16 BIN0- Bport (-)LVDS CH0 differential data input LVDS
17 BIN0+ Bport (+)LVDS CH0 differential data input LVDS
18 BIN1- Bport (-)LVDS CH1 differential data input LVDS
19 BIN1+ Bport (+)LVDS CH1 differential data input LVDS
20 BIN2- Bport (-)LVDS CH2 differential data input LVDS
21 BIN2+ Bport (+)LVDS CH2 differential data input LVDS
22 GND GND
23 BCK- Bport LVDS Clock signal(-) LVDS
24 BCK+ Bport LVDS Clock signal(+) LVDS
25 BIN3- Bport (-)LVDS CH3 differential data input LVDS
26 BIN3+ Bport (+)LVDS CH3 differential data input LVDS
27 NC It is required to set non-connection (OPEN)
28 NC It is required to set non-connection (OPEN)
29 GND GND
30 SELLVDS Select LVDS data order [Note 1] 10k Pull up :3.3V
31 R/L Horizontal shift direction[Note 2] 10k Pull Down :GND
32 U/D Vertical shift direction [Note 2] 10k Pull Down :GND
33 VBRT Inverter Brightness Control (Analog Voltage:0-3.3V) [Note 4]
34 Frame1 Frame frequency setting H:60Hz, L:50Hz 10k Pull Down :GND
35 Reserved It is required to set non-connection (OPEN)
36 TEMP3 Data3 of panel surface temperature [Note3] 10k Pull Down :GND
37 TEMP2 Data2 of panel surface temperature [Note3] 10k Pull Down :GND
38 TEMP1 Data1 of panel surface temperature [Note3] 10k Pull Down :GND
39 VON Inverter ON/OFF setting H:ON, L:OFF [Note 4] 10k Pull Down :GND
40 O/Sset O/S operation setting H:O/S_ON, L:O/S_OFF 10k Pull Down :GND
41 NC It is required to set non-connection (OPEN)
[note] GND of a liquid crystal panel drive part has connected with a module chassis.
[note] L,"0": Low level voltage (GND) H,"1": High level voltage(3.3V)
[note]In case of O/S set setting "0"(O/S_OFF), it should be set the Temp1~3 to "0".
4
CN2 +12V DC power supply Shown in Fig.1-2
Using connector : (J.S.T. Mfg Co.,Ltd.)
Mating connector : (connector) J.S.T. Mfg Co.,Ltd.
: (Terminal) J.S.T. Mfg Co.,Ltd.
Pin No. Symbol Function Remark
1 VCC +12V Power Supply
2 VCC +12V Power Supply
3 VCC +12V Power Supply
4 VCC +12V Power Supply
5 VCC +12V Power Supply
6 GND GND
7 GND GND
8 GND GND
9 GND GND
10 GND GND
11 Reserved It is required to set non-connection (OPEN)
12 Reserved It is required to set non-connection (OPEN)
13 Reserved It is required to set non-connection (OPEN)
14 Reserved It is required to set non-connection (OPEN)
15 Reserved It is required to set non-connection (OPEN)
16 Reserved It is required to set non-connection (OPEN)
17 Reserved It is required to set non-connection (OPEN)
18 Reserved It is required to set non-connection (OPEN)
19 Reserved It is required to set non-connection (OPEN)
20 Reserved It is required to set non-connection (OPEN)
5
Interface block diagram
(TV Side)
(TFT-LCD side)
Port A AIN0+(11)
8
AR0 AR7 Port A
8
8 AIN0-(10) AR0 AR7
AG0 AG7
LCD Internal Circuit
AIN1+(13) 8
8 AG0 AG7
AB0 AB7
LVDS 8
AIN1-(12) TTL AB0 AB7
AIN2+(15)
AIN2-(14)
TTL
LVDS
AIN3+(19)
ENAB_A
AIN3-(18) ENAB_A
ACK+(17)
Controller
CLKA PLL PLL
ACK-(16) CLKA
Port B
8 BIN0+(21)
BR0 BR7 Port B
8
8 BIN0-(20) BR0 BR7
BG0 BG7
8
BIN1+(23) BG0 BG7
8
BB0 BB7 8
LVDS BIN1-(22) TTL BB0 BB7
BIN2+(25)
BIN2-(24)
TTL
LVDS
BIN3+(29)
ENAB_B
BIN3-(28) ENAB_B
BCK+(27)
CLKB PLL PLL CLKB
BCK-(26)
Corresponding Transmitter: THC63LVDM83R (THine) or equivalent device
Block Diagram (LCD Module)
6
[Note 1]SELLVDS
Transmitter SELLVDS
Pin No Data =L(GND) =H(3.3V) or Open
51 TA0 R0(LSB) R2
52 TA1 R1 R3
54 TA2 R2 R4
55 TA3 R3 R5
56 TA4 R4 R6
3 TA5 R5 R7(MSB)
4 TA6 G0(LSB) G2
6 TB0 G1 G3
7 TB1 G2 G4
11 TB2 G3 G5
12 TB3 G4 G6
14 TB4 G5 G7(MSB)
15 TB5 B0(LSB) B2
19 TB6 B1 B3
20 TC0 B2 B4
22 TC1 B3 B5
23 TC2 B4 B6
24 TC3 B5 B7(MSB)
27 TC4 NA NA
28 TC5 NA NA
30 TC6 DE(*) DE(*)
50 TD0 R6 R0(LSB)
2 TD1 R7(MSB) R1
8 TD2 G6 G0(LSB)
10 TD3 G7(MSB) G1
16 TD4 B6 B0(LSB)
18 TD5 B7(MSB) B1
25 TD6 NA NA
NA: Not Available
DE: Display Enable
(*) Since the display position is prescribed by the rise of DE (Display Enable) signal, please do not fix
DE signal during operation at "High".
7
SELLVDS= High (3.3V) or Open
1 cycle
CKAIN+
CKAIN-
RIN0+ R3 R2 G2 R7 R6 R5 R4 R3 R2 G2
RIN0-
RIN1+
G4 G3 B3 B2 G7 G6 G5 G4 G3 B3
RIN1-
RIN2+ B5 B4 DE NA NA B7 B6 B5 B4 DE
RIN2-
RIN3+
R1 R0 NA B1 B0 G1 G0 R1 R0 NA
RIN3
SELLVDS= Low(GND)
1 cycle
CKIN+
CKIN-
RIN0+ R1 R0 G0 R5 R4 R3 R2 R1 R0 G0
RIN0-
RIN1+
G2 G1 B1 B0 G5 G4 G3 G2 G1 B1
RIN1-
RIN2+ B3 B2 DE NA NA B5 B4 B3 B2 DE
RIN2-
RIN3+ R7 R6 NA B7 B6 G7 G6 R7 R6 NA
RIN3-
DE: Display Enable
NA: Not Available (Fixed Low)
CN2 (O/S control) (Shown Fig 1)
O/S Driving Pin No and function
Using connector : SM07B-SRSS-TB-A (JST)
Mating connector : SHR-07V-S or SHR-07V-S-B JST
Pin No. Symbol Function Default
1 Frame Frame frequency setting H:60Hz, L:50Hz Pull down 0V : (GND)
2 O/S set O/S operation setting H:O/S_ON, L:O/S_OFF Pull down 0V : (GND)
3 TEST Fix to Low level usually. Pull down 0V : (GND)
4 Temp3 Data3 of panel surface temperature Pull down 0V : (GND)
5 Temp2 Data2 of panel surface temperature Pull down 0V : (GND)
6 Temp1 Data1 of panel surface temperature Pull down 0V : (GND)
7 GND GND
*L: Low level voltage (GND) H: High level voltage(3.3V)
Note In case of O/S set setting "L"(O/S_OFF), it should be set the "Temp1~3" and "Frame" to "L".
According as the surface temperature of the panel, enter the optimum 3 bit signal into pin No.4,5,6.
Measuring the correlation between detected temperature by the sensor on PWB in users side and actual surface
temperature of panel at center, convert the temperature detected by the sensor to the surface temperature of
panel to enter the 3 bit temperature data.
Surface temperature of panel
Pin no. 0-5 5-10 10-15 15-20 20-25 25-30 30-35 35 and
above
4 L L L L H H H H
5 L L H H L L H H
6 L H L H L H L H
*L: Low level voltage (GND) H: High level voltage(3.3V)
*For overlapping temperatures (such as 5 ,10 ,15 ,20 ,25 , 30 ,35 ) select the optimum parameter,
judging from the actual picture image.
4-2. Backlight driving
CN3 (Inverter control)
Using connector: B14B-PH-SM3-TB(JST)
Mating connector: PHR-14 (JST)
Pin No. Symbol Function Remark
1 VINV +24V
2 VINV +24V
3 VINV +24V
4 VINV +24V
5 VINV +24V
6 GND GND
7 GND GND
8 GND GND
9 GND GND
10 GND GND
11 Reserved NC
12 VON Inverter ON/OFF ◦ Jabse Service Manual Search 2026 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo