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Panel_SHARP_LK315T3LZ5L_0_[DS]


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                               RECORDS OF REVISION
         MODEL No. : LK315T3LZ5L
         SPEC No. : LD-19902
                               REVISED
        DATE         NO.                 PAGE                SUMMARY                         NOTE
                                 No.
       2007.9.3   LD-19902                                                                 1st Issue




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                                                                                                                    LD-19902-1

         1. Application
             This specification applies to the color 31.5" Wide XGA TFT-LCD module LK315T3LZ5L.

         * These specification sheets are proprietary products of SHARP CORPORATION ("SHARP") and include materials
         protected under copyright of SHARP. Do not reproduce or cause any third party to reproduce them in any form or by
         any means, electronic or mechanical, for any purpose, in whole or in part, without the express written permission of
         SHARP.

         * In case of using the device for applications such as control and safety equipment for transportation (aircraft, trains,
            automobiles, etc.), rescue and security equipment and various safety related equipment which require higher
            reliability and safety, take into consideration that appropriate measures such as fail-safe functions and redundant
            system design should be taken.

         * Do not use the device for equipment that requires an extreme level of reliability, such as aerospace applications,
           telecommunication equipment (trunk lines), nuclear power control equipment and medical or other equipment for
           life support.

         * SHARP assumes no responsibility for any damage resulting from the use of the device that does not comply with
            the instructions and the precautions specified in these specification sheets.

         * Contact and consult with a SHARP sales representative for any questions about this device.

         2. Overview
           This module is a color active matrix LCD module incorporating amorphous silicon TFT (Thin Film Transistor). It is
         composed of a color TFT-LCD panel, driver ICs, control circuit, power supply circuit, inverter circuit and back light
         system etc. Graphics and texts can be displayed on a 1366 RGB 768 dots panel with 16,777,216 colors by
         using LVDS (Low Voltage Differential Signaling) to interface, +5V of DC supply voltages.
            This module also includes the DC/AC inverter to drive the CCFT. (+24V of DC supply voltage)
            And in order to improve the response time of LCD, this module applies the Over Shoot driving (O/S driving)
         technology for the control circuit .In the O/S driving technology, signals are being applied to the Liquid Crystal
         according to a pre-fixed process as an image signal of the present frame when a difference is found between image
         signal of the previous frame and that of the current frame after comparing them.
            By using the captioned process, the image signals of this LCD module are being set so that image response can be
         completed within one frame, as a result, image blur can be improved and clear image performance can be realized.



         3. Mechanical Specifications
                          Parameter                                Specifications                           Unit
                                                     80.039     Diagonal                                     cm
                  Display size
                                                     31.5    Diagonal                                       inch
                  Active area                        697.69 (H) x 392.26 (V)                                mm
                                                     1366 (H) x 768 (V)
                  Pixel Format                                                                              pixel
                                                        1pixel = R + G + B dot
                  Pixel pitch                        0.51075(H) x 0.51075 (V)                               mm
                  Pixel configuration                R,G, B vertical stripe
                  Display mode                       Normally black
                  Unit Outline Dimensions (*1)       760.0(W) x 450.0(H) x 50.1(D)                          mm
                  Mass                               7.5 0.5                                                kg
                                                     Anti glare
                  Surface treatment
                                                     Hard coating: 2H
                (*1) Outline dimensions are shown in Fig.1




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                                                                                                             LD-19902-2
         4. Input Terminals
            4-1. TFT panel driving
            CN1 (Interface signals and +5V DC power supply) (Shown in Fig.1)
             Using connector      FI-X30SSL-HF (Japan Aviation Electronics Ind. , Ltd.)   or equivalent
             Mating connector     FI-X30H/FI-X30HL, FI-X30C/FI-X30C2L
                                   or FI-X30M (Japan Aviation Electronics Ind. , Ltd.)
             Mating LVDS transmitter THC63LVDM83R or equivalent device
              Pin No.        Symbol                      Function                                         Remark
                 1            VCC        +5V Power Supply
                 2            VCC        +5V Power Supply
                 3            VCC        +5V Power Supply
                 4            VCC        +5V Power Supply
                 5            GND        GND
                 6            GND        GND
                 7            GND        GND
                 8            GND        GND
                                                                                                        Pull up
                  9            SELLVDS        Select LVDS data order      Note 1                   Default H:3.3V
                                                                                                       Note 3
                 10               NC
                 11              GND          Ground
                 12              RIN0-        Negative (-) LVDS differential data input                   LVDS
                 13              RIN0+        Positive (+) LVDS differential data input                   LVDS
                 14              GND          Ground
                 15              RIN1-        Negative (-) LVDS differential data input                   LVDS
                 16              RIN1+        Positive (+) LVDS differential data input                   LVDS
                 17              GND          Ground
                 18              RIN2-        Negative (-) LVDS differential data input                   LVDS
                 19              RIN2+        Positive (+) LVDS differential data input                   LVDS
                 20              GND          Ground
                 21             CLKIN-        Clock Signal(-)                                             LVDS
                 22             CLKIN+        Clock Signal(+)                                             LVDS
                 23              GND          Ground
                 24              RIN3-        Negative (-) LVDS differential data input                   LVDS
                 25              RIN3+        Positive (+) LVDS differential data input                   LVDS
                 26              GND          Ground
                                                                                                      Pull down
                 27              R/L          Horizontal shift direction     Note 2                Default L:GND
                                                                                                       Note 4
                                                                                                      Pull down
                 28              U/D          Vertical shift direction    Note 2                   Default L:GND
                                                                                                       Note 4
                 29        Reserved         Not Available
                 30        Reserved         Not Available
              note GND of a liquid crystal panel drive part has connected with a module chassis.




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                                                                                                       LD-19902-3
            Note1    SELLVDS

                     Transmitter                                 SELLVDS
                Pin No         Data                =L(GND)             =H(3.3V) or Open
                  51           TA0                 R0(LSB)                   R2
                  52           TA1                    R1                     R3
                  54           TA2                    R2                     R4
                  55           TA3                    R3                     R5
                  56           TA4                    R4                     R6
                   3           TA5                    R5                  R7(MSB)
                   4           TA6                 G0(LSB)                   G2
                   6           TB0                    G1                     G3
                   7           TB1                    G2                     G4
                  11           TB2                    G3                     G5
                  12           TB3                    G4                     G6
                  14           TB4                    G5                  G7(MSB)
                  15           TB5                 B0(LSB)                   B2
                  19           TB6                    B1                     B3
                  20           TC0                    B2                     B4
                  22           TC1                    B3                     B5
                  23           TC2                    B4                     B6
                  24           TC3                    B5                  B7(MSB)
                  27           TC4                   NA                      NA
                  28           TC5                   NA                      NA
                  30           TC6                  DE(*)                   DE(*)
                  50           TD0                    R6                   R0(LSB)
                   2           TD1                 R7(MSB)                   R1
                   8           TD2                    G6                  G0(LSB)
                  10           TD3                 G7(MSB)                   G1
                  16           TD4                    B6                   B0(LSB)
                  18           TD5                 B7(MSB)                   B1
                  25           TD6                   NA                      NA
             NA: Not Available

             (*) Since the display position is prescribed by the rise of DE (Display Enable) signal,
               please do not fix DE signal during operation at "High."




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                                                                                                          LD-19902-4
             Note 2 Display reversal function

                            Normal (Default)                               Horizontal reverse image
                                                :




                            Vertical reverse image                    Horizontal and vertical reverse image
                                                :                                                     :




           Note 3   The equivalent circuit figure of the terminal




           Note 4   The equivalent circuit figure of the terminal




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                                                                                                                     LD-19902-5
           Interface block diagram
             Corresponding Transmitter: THC63LVDM83R (THine) or equivalent device

                                        side
                                                                                    (TFT -   LCD side)
                                    8                     Rx1IN0+(13)
                        G0    G7
                                                                                                         8
                                    8                     Rx1IN0-(12)                                        R0     R7
                        R0   R7
                                                          Rx1IN1+(16)                                    8
                                    8                                                                        G0     G7
                        B0   B7
                                               LVDS                                                      8
                                                          Rx1IN1-(15)        TTL                             B0     B7




                                                                                                                           Internal circuits
                                                          Rx1IN2+(19)
                                                          Rx1IN2-(18)
                                               TTL
                                                                            LVDS
                                                          Rx1IN3+(25)
                             ENAB
                                                          Rx1IN3-(24)                                        ENAB

                                                          Rx1CLKIN+(22)
           controller
                              CLK              PLL                          PLL
                                                          Rx1CLKIN-(21)                                       CK




           Block Diagram (LCD Module)




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                                                                                              LD-19902-6
         SELLVDS= High (3.3V) or Open

                                                            1 cycle


         CKAIN+

         CKAIN-



         RIN0+                R3     R2   G2    R7     R6     R5      R4   R3     R2     G2
         RIN0-


         RIN1+
                              G4     G3   B3    B2     G7     G6      G5   G4     G3     B3
         RIN1-



         RIN2+                B5     B4   DE    NA     NA     B7      B6   B5     B4     DE
         RIN2-


         RIN3+
                              R1     R0   NA    B1     B0     G1      G0   R1     R0     NA
         RIN3



         SELLVDS= Low(GND)
                                                            1 cycle

         CKIN+


         CKIN-



         RIN0+                R1     R0   G0    R5     R4     R3      R2   R1     R0     G0

         RIN0-


         RIN1+
                              G2     G1   B1    B0     G5     G4      G3   G2     G1     B1
         RIN1-



         RIN2+                B3     B2   DE    NA     NA     B5      B4   B3     B2     DE

         RIN2-

         RIN3+                R7     R6   NA    B7     B6     G7      G6   R7     R6     NA
         RIN3-

         DE: Display Enable
         NA: Not Available (Fixed Low)




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                                                                                                                 LD-19902-7
          CN2 (O/S control)     (Shown Fig 1)
             O/S Driving Pin No and function
                 Using connector : SM07B-SRSS-TB-A (JST)
                 Mating connector      :     SHR-07V-S or SHR-07V-S-B JST
              Pin No.    Symbol                                  Function                             Default            Remark
                 1        Frame            Frame frequency setting        H:60Hz, L:50Hz       Pull up     H:3.3V        Note 2
                 2       O/S set           O/S operation setting    H:O/S_ON, L:O/S_OFF        Pull up     H:3.3V        Note 2
                                                                                                       Note 1
                 3         TEST       Fix to Low level usually.                                Pull down L:GND            Note 3
                 4        Temp3       Data3 of panel surface temperature                       Pull up     H:3.3V         Note 2
                 5        Temp2       Data2 of panel surface temperature                       Pull up     H:3.3V         Note 2
                 6        Temp1       Data1 of panel surface temperature                       Pull up     H:3.3V         Note 2
                 7         GND        GND
              *L: Low level voltage (GND) H: High level voltage(3.3V)
             Note 1 In case of O/S set setting "L"(O/S_OFF), it should be set the "Temp1~3" and "Frame" to "L".


             Note 2 The equivalent circuit figure of the terminal            Note 3 The equivalent circuit figure of the terminal




               According as the surface temperature of the panel, enter the optimum 3 bit signal into pin No.4,5,6.
              Measuring the correlation between detected temperature by the sensor on PWB in users side and actual surface
              temperature of panel at center, convert the temperature detected by the sensor to the surface temperature of
              panel to enter the 3 bit temperature data.

                                                           Surface temperature of panel
               Pin no.    0-5        5-10         10-15       15-20      20-25      25-30     30-35      35    and
                                                                                                           above
                  4         L         L              L          L         H           H          H           H
                  5         L         L              H          H         L           L          H           H
                  6         L         H              L          H         L           H          L           H
             *L: Low level voltage (GND)        H: High level voltage(3.3V)
             *For overlapping temperatures (such as 5 ,10 ,15          ,20   ,25 , 30 ,35     ) select the optimum parameter,
              judging from the actual picture image.




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                                                                                                               LD-19902-8
         4-2. Backlight driving
           CN101 (Inverter control)
              Using connector: B14B-PH-SM3-TB(JST)
             Mating connector: PHR-14 (JST)
                 Pin No.         Symbol                       Function                    Remark
                    1              VINV                         +24V
                    2              VINV                         +24V
                    3              VINV                         +24V
                    4              VINV                         +24V
                    5              VINV                         +24V
                    6             GND                           GND
                    7             GND                           GND
                    8             GND                           GND
                    9             GND                           GND
                   10             GND                           GND
                   11            Reserved                        NA
                   12              VON                    Inverter ON/OFF                  Note 1
                   13             VBRT                    Brightness Control               Note 2
                   14            Reserved                        NA
             NA: Not Available


             Note 1   Inverter ON/OFF
                Input voltage                                 Function
                    3.3V                                    Inverter: ON
                     0V                                     Inverter: OFF



             Note 2 Brightness Control
             PWM Brightness Control is regulated by analog input voltage (0V to 3.3V) .
                Input voltage                            Function
                     0V                         Brightness Control : (Dark)
                    3.3V                        Brightness Control : (Bright)



         4-3. The back light system characteristics
              The back light system is direct type with 14 CCFTs (Cold Cathode Fluorescent Tube).
             The characteristics of the lamp are shown in the following table.
             The value mentioned below is at the case of one CCFT.
                 Item          Symbol           Min.              Typ.         Max.     Unit         Remarks
               Life time          TL           50000            60000           -       Hour           Note
             Note     Lamp life time is defined as the time when brightness becomes 50% of the original value in the
                       continuous operation under the condition of Ta=25        and brightness control(VBRT=3.3V).
                      This definition is valid with the condition that the module is placed horizontally. (The wide side of the
                       module should be parallel to the ground.)




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                                                                                                 LD-19902-9
         5. Absolute Maximum Ratings
                     Parameter       Symbol         Condition                   Ratings   Unit   Remark
                   Input voltage
                                       VI           Ta=25                   -0.3 ~ 5.0     V     Note 1
                   (for Control)
                 5V supply voltage
                                      VCC           Ta=25                       0~+6       V
                   (for Control)
                   Input voltage      VBRT
                                                    Ta=25                       0~+6       V
                   (for Inverter)     VON
                24V supply voltage
                                      VINV          Ta=25                       0 ~ +29    V
                   (for Inverter)
               Storage temperature      Tstg               -                -25 ~ +60
                                                                                                 Note 2
              Operation temperature
                                     Topa            -                 0 ~ +50
                   (Ambient)
              Note 1 SELLVDS, R/L, U/D,TEST, Frame, O/S set, Temp1, Temp2, Temp3
              Note 2 Humidity 95%RH Max.(Ta 40 )
                      Maximum wet-bulb temperature at 39       or less.(Ta>40     )
                      No condensation.




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                                                                                                                           LD-19902-10
         6. Electrical Characteristics
            6-1. Control circuit driving                                                                          Ta=25
                          Parameter           Symbol                Min.         Typ.         Max.        Uniit         Remark
                                Supply voltage Vcc                  +4.5         +5.0         +5.5         V            Note 1
                 +5V supply         Current     Icc                  -           800          1800        mA            Note 2
                   voltage        dissipation  IRUSH                 -            -           2000        mA            Note 7
                                               TRUSH                 -            -             1          ms           Note 7
                    Permissible input ripple    VRP                                                                   Vcc = +5.0V
                                                                     -             -           100        mVP-P
                            voltage
                 Differential input     High    VTH                   -            -           100         mV         VCM = +1.2V
                 threshold voltage      Low     VTL                 -100           -            -          mV           Note 6
                      Input Low voltage         VIL                   -            -           0.7         V
                                                                                                                          Note 3
                      Input High voltage        VIH                  2.6          3.3          3.6         V
                                                                                                                         VI = 0V
                                                       IIL1          -             -           100         A
                                                                                                                         Note 4
                    Input leak current (Low)
                                                                                                                         VI = 0V
                                                       IIL2          -             -           400         A
                                                                                                                         Note 5
                                                                                                                        VI =3.3V
                                                       IIH1          -             -           100         A
                                                                                                                         Note 4
                    Input leak current (High)
                                                                                                                        VI =3.3V
                                                       IIH2          -             -           400         A
                                                                                                                         Note 5
                       Terminal resistor       RT      -                          100           -                   Differential input
           Note      VCM: Common mode voltage of LVDS driver.
           Note 1
             Input voltage sequences                                         Dip conditions for supply voltage
                   0 < t1 10ms                                                    a) 2.7V Vcc < 4.5V
                   0< t2-1 20ms                                                           td 10ms
                       t2-2 10ms                                                  b) Vcc < 2.7V
                   0 < t3 1s                                                 Dip conditions for supply voltage is
                        t4 1s                                                based on input voltage sequence.
                        t5 200ms
                    0.9VCC
                                                       0.9Vcc

               0.1Vcc                                     0.1Vcc
             Vcc                                                    0.1Vcc
                             t2-1
                                                              t4
                        t1                       t3
            Data1



                             t2-2
            Data2
                                     t5   ON


            Back light:Vinv         OFF                    OFF




               Data1:CLKIN ,RIN0               ,RIN1    , RIN2 , RIN3
               Data2:R/L,U/D,SELLVDS,Frame,O/Sset,Temp1,2,3
               About the relation between data input and back light lighting, please base on the above-mentioned input
               sequence.
                When back light is switched on before panel operation or after a panel operation stop, it may not display
                   normally. But this phenomenon is not based on change of an incoming signal, and does not give damage to a
                   liquid crystal display.




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                                                                                                        LD-19902-11

           Note 2   Typical current situation: 256 gray-bar pattern (Vcc = +5.0V)
                    The explanation of RGB gray scale is seen in section 8.



                                                                               Vcc 5.0V
                                                                               CK 82.0MHz
                                                                               Th 20.67 s




           Note 3    R/L, U/D, SELLVDS, TEST, Frame, O/S set, Temp1, Temp2, Temp3
           Note 4    R/L, U/D
           Note 5    SELLVDS, TEST, Frame, O/S set, Temp1, Temp2, Temp3
           Note 6    CLKIN+/CLKIN-, RIN0+/RIN0-, RIN1+/RIN1-, RIN2+/RIN2-, RIN3+/RIN3-,
           Note 7    The Rush current corrugation at the time of power on




                             5ms
                                                                    Vcc5V
                                     0.9Vcc                         (1V/div)        Input voltage conditions
                                                                                    Vcc = 5V
                                 IRUSH
                                 (Max)                                               t1 = 5ms
                                           TRUSH


                    0.1Vcc
                                                                     IRUSH
                                                                     (500mA/div)
                                         4ms/div




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                                                                                                                LD-19902-12
         6-2. Inverter driving for back light
           The back light system is direct type with 14 CCFTs (Cold Cathode Fluorescent Tube).                       Ta=25
                  Parameter               Symbol        Min.       Typ.        Max.         Unit                 Remark
                  Current dissipation1          IINV         -        4.5             5.0        A           VINV = 24V
           24V
                  Current dissipation1                                4.2             4.6        A       VBRT = 3.3V, VON=5V
                                                                                                               Note 1,2
                   Supply voltage               VINV        22.5      24.0            25.5       V
            Permissible input ripple
                                                VRF          -         -              800       mVp-p          VINV = 24V
                    voltage
             Input voltage (Low)                VONL         0         -              1.0        V                 Von
             Input voltage (High)               VONH        3.0       3.3             5.0        V          impedance=6.5k

           Brightness control voltage                        0                        3.3        V
           Brightness control voltage                                                                             VBRT
                                        VBRT                 0                        3.3        V
                       vs                                                                                   impedance=400k
                Brightness level
                                                            20                        100        %
               (Reference value)
           Note 1 1)VINV-turn-on condition

                                       0.9VINV                                         300ms T1 100Ps
                                                                                       T2 1Ps
                                 0.1VINV
                          VINV
                                           T1          T2
                        VON,VBRT     0V                     0.1VON




                      2) VINV-turn-off condition

                              VON,VBRT                                                       t1 0ms

                                                                 t1
                                           1.0V                               0V
                              VINV
                                                                             0.9VINV

                                                                                 0V


           Note 2      Current dissipation 1 : Definition within 60 minutes after turn on. (Rush current is excluded.)
                    Current dissipation 2 : Definition more than 60minutes after turn on.


           Note      The inverter unit is driving at the following drive frequency.
                            Lamp driving frequency : 41kHz
                            Burst dimmer frequency : 165Hz
                    There is possibility that the display problem of the backlights such as flicker, blinking, etc by the
                    interference of the above inverter driving frequency and the LCD driving frequency will occur.
                    In setting of a LCD driving frequency, we recommend to set for the no interference with the above
                    frequency to occur.




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                                                                                                                 LD-19902-13
         7. Timing characteristics of input signals
            7-1. Timing characteristics
             Timing diagrams of input signal are shown in Fig.2
                               Parameter                  Symbol           Min.            Typ.          Max.              Unit
              Clock                   Frequency            1/Tc             80              82            85               MHz
                                                                           1686            1696          1940              clock
                                  Horizontal period           TH
                                                                           19.8            20.68           -                 s
            Data enable
                               Horizontal period (High)    THd             1366            1366          1366              clock
              signal
                                   Vertical period         TV               778             806           972               line
                                Vertical period (High)     TVd              768             768           768               line
             Note     When vertical period is very long, flicker may occur.
                      Please turn off the module after it shows the black screen.
                      Please make sure that length of vertical period should become of an integral
                      multiple of horizontal length of period. Otherwise, the screen may not display properly.
                      As for the your final setting of driving timing, we will conduct operation check test at our side,
                      please inform your final setting.



                                                          TH

                                                                       THd




                          1366                            1        2                    1366




                          Tc


                                                                       1      2         767    768




                                                                                  TVd
                                                              TV



                                                   Fig.2 Timing characteristics of input signals




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                                                                                          LD-19902-14
         7-2. Input data signal and display position on the screen


                              R1 G1 B1 R2 G2 B2




                                                          R G B




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                                                                                                                                                          LD-19902-15
         8. Input Signal, Basic Display Colors and Gray Scale of Each Color
                                                                                                        Data signal
                               Colors &
                                            Gray    R0   R1   R2   R3       R4   R5   R6   R7 G0   G1    G2   G3       G4   G5   G6   G7   B0   B1   B2   B3       B4   B5   B6   B7
                               Gray scale
                                            Scale

                                 Black              0    0    0    0        0    0    0    0   0   0     0    0        0    0    0    0    0    0    0     0       0    0    0    0

                                 Blue               0    0    0    0        0    0    0    0   0   0     0    0        0    0    0    0    1    1    1     1       1    1    1    1

                                 Green              0    0    0    0        0    0    0    0   1   1     1    1        1    1    1    1    0    0    0     0       0    0    0    0
         Basic Color




                                 Cyan               0    0    0    0        0    0    0    0   1   1     1    1        1    1    1    1    1    1    1     1       1    1    1    1

                                  Red               1    1    1    1        1    1    1    1   0   0     0    0        0    0    0    0    0    0    0     0       0    0    0    0

                               Magenta              1    1    1    1        1    1    1    1   0   0     0    0        0    0    0    0    1    1    1     1       1    1    1    1

                                Yellow              1    1    1    1        1    1    1    1   1   1     1    1        1    1    1    1    0    0    0     0       0    0    0    0

                                 White              1    1    1    1        1    1    1    1   1   1     1    1        1    1    1    1    1    1    1     1       1    1    1    1

                                 Black      GS0     0    0    0    0        0    0    0    0   0   0     0    0        0    0    0    0    0    0    0     0       0    0    0    0

                                   



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