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Panel_SHARP_LQ150X1LW72_0_[DS]


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LQ150X1LW72
 SPEC No.        DATE         REVISED                                         SUMMARY                    NOTE
                               No.      PAGE
LD-18322A     APR. 13. 2006                                                                             1st Issue
LD-18322B      Sep. 1. 2006       2         1
                                                      Confirm "10. Handling Precautions " item
                                                      when you use the device.
                                        3       7


                                                    Added Data Mapping
                                            8       Changed Absolute Maximum Ratings
                                                      Operating temperature (Ambient)
                                                           0       +50


                                                      Operating temperature Panel surface
                                                               0    +60
                                         14         Added 6bit input signals
                                         17         Add items to Handling Precautions
                                         18         Changed          Reliability test items
                                                     High temperature operation test
                                                          Ta = 50         240h
                                                           (The panel temp. must be less than 60 )


                                                          Tp = 60         (panel surface)     240h
LD-18322C      Oct.17.2006        3         9       Changed Values
                                                      1     On-off sequences of Vcc and data
                                                               0     t2 10ms           0      t2 50ms
                                                                    0    t3   1s       0      t3 50ms
                                                                                                     LD-18322C-1


1. Application
    This specification applies to the color 15.0 XGA TFT-LCD module LQ150X1LW72.


  These specification sheets are the proprietary product of SHARP CORPORATION("SHARP) and include
  materials protected under copyright of SHARP. Do not reproduce or cause any third party to reproduce them in
  any form or by any means, electronic or mechanical, for any purpose, in whole or in part, without the express
  written permission of SHARP.


  The device listed in this specification was designed and manufactured for use in general electronic equipment.


  In case of using the device for applications such as control and safety equipment for transportation(aircraft,
  trains, automobiles, etc. ), rescue and security equipment and various safety related equipment which require
  higher reliability and safety, take into consideration that appropriate measures such as fail-safe functions and
  redundant system design should be taken.


  Do not use the device for equipment that requires an extreme level of reliability, such as aerospace applications,
  telecommunication equipment(trunk lines), nuclear power control equipment and medical or other equipment
  for life support.


  SHARP assumes no responsibility for any damage resulting from the use of the device which does not comply
  with the instructions and the precautions specified in these specification sheets.


  Confirm "10. Handling Precautions " item when you use the device.            2


  Contact and consult with a SHARP sales representative for any questions about this device.
                                                                                                   LD-18322C-2
2. Overview
 This module is a color active matrix LCD module incorporating amorphous silicon TFT      (Thin Film Transistor).
It is composed of a color TFT-LCD panel, driver ICs, control circuit, power supply circuit and a back light unit.
Graphics and texts can be displayed on a 1024       RGB     768 dots panel with about 16 million colors by using
LVDS (Low Voltage Differential Signaling) and supplying +3.3V DC supply voltages for TFT-LCD panel
driving and supply voltage for backlight.
 It is a wide viewing-angle-module
(Vertical viewing angle:170    Horizontal viewing angle:170        ,CR   10).
  Backlight-driving DC/AC inverter is not built in this module.


3. Mechanical Specifications
               Parameter                          Specifications                Unit
     Display size                      38 (Diagonal)                             cm
                                       15.0 (Diagonal)                          Inch
     Active area                       304.1 (H)     228.1 (V)                  mm
     Pixel format                      1024 (H)     768 (V)                     Pixel
                                       (1 pixel    R+G+B dots)
     Pixel pitch                       0.297 (H)     0.297 (V)                  mm
     Pixel configuration               R, G, B vertical stripe
     Display mode                      Normally black
     Unit outline dimensions *1        331.6(W)      254.76(H)      12.5(D)     mm
     Mass                              1350(MAX)                                 g
     Surface treatment                 Anti-glare , LR-coating
                                       and hard-coating 2H
                                       (Haze value = 42)
     *1.Note: excluding back light cables.
       The thickness of module (D) doesn't contain the projection.
        Outline dimensions are shown in Fig.1.
                                                                                          LD-18322C-3
4. Input Terminals      2
 4-1. TFT-LCD panel driving
  CN1 (Interface signals and +3.3V DC power supply)
     Using connectors                  DF14H-20P-1.25H (Hirose Electric Co., Ltd.)
     Corresponding connectors          DF14-20S-1.25C(Connector)
                                       DF14-2628SCFA(Terminal)
     Using LVDS Receiver               Contained in a control IC. [THC63LVDF84A(Thine) compatible]
     Corresponding LVDS Transmitter THC63LVDM83R(Thine) or compatible


   Pin No.     Symbol                             Function                          Remark
      1         Vcc         +3.3V Power supply
      2         Vcc         +3.3V Power supply
      3         GND
      4         GND
      5        RXIN0-       Receiver signal (-)                                      LVDS
      6       RXIN0+        Receiver signal (+)                                      LVDS
      7         GND
      8        RXIN1-       Receiver signal (-)                                      LVDS
      9       RXIN1+        Receiver signal (+)                                      LVDS
     10         GND
     11        RXIN2-       Receiver signal (-)                                      LVDS
     12       RXIN2+        Receiver signal (+)                                      LVDS
     13         GND
     14       RXCKIN-       Clock signal (-)                                         LVDS
     15      RXCKIN+        Clock signal (+)                                         LVDS
     16         GND
     17        RXIN3-       Receiver signal (-)                                      LVDS
     18       RXIN3+        Receiver signal (+)                                      LVDS
     19         GND
     20      LVDS_SET       LVDS_SET                                                 note1
                                                                     LD-18322C-4

4-2 Data Mapping
 1) 8 bit input
     note1 pin assignment with LVDS_SET pin (Thine:THC63LVDM83R)


               Transmitter                 20pin   LVDS_SET

        Pin No          Data    =L (GND) or Open         =H (3.3V)
          51            TA0         R0 (LSB)                R2
          52            TA1            R1                   R3
          54            TA2            R2                   R4
          55            TA3            R3                   R5
          56            TA4            R4                   R6
           3            TA5            R5                R7 (MSB)
           4            TA6         G0 (LSB)                G2
           6            TB0            G1                   G3
           7            TB1            G2                   G4
          11            TB2            G3                   G5
          12            TB3            G4                   G6
          14            TB4            G5                G7 (MSB)
          15            TB5         B0 (LSB)                B2
          19            TB6            B1                   B3
          20            TC0            B2                   B4
          22            TC1            B3                   B5
          23            TC2            B4                   B6
          24            TC3            B5                B7 (MSB)
          27            TC4           (NA)                 (NA)
          28            TC5           (NA)                 (NA)
          30            TC6            DE                   DE
          50            TD0            R6                R0 (LSB)
           2            TD1         R7 (MSB)                R1
           8            TD2            G6                G0 (LSB)
          10            TD3         G7 (MSB)                G1
          16            TD4            B6                B0 (LSB)
          18            TD5         B7 (MSB)                B1
          25            TD6           (NA)                 (NA)
                                    LD-18322C-5

                          1 cycle


    RxCXIN+
    RxCXIN-



     RxIN0+
     RxIN0-


     RxIN1+
     RxIN1-


     RxIN2+
     RxIN2-

     RxIN3+
     RxIN3-

   DE : Display Enable
   NA : Not Available







                          1 cycle

   RxCKIN+
   RxCKIN-



    RXIN0+
    RXIN0-


    RXIN1+
    RXIN1-


    RXIN2+
    RXIN2-

    RXIN3+
    RXIN3-

    DE : Display Enable
    NA : Not Available
                                                                              LD-18322C-6
4-3 Data Mapping
 2) 6 bit input
     note1 pin assignment with LVDS_SET pin (Thine:THC63LVDM83R)
                   Transmitter                20pin   LVDS_SET

            Pin No          Data   =L (GND) or Open          =H (3.3V)
              51            TA0                              R0 (LSB)
              52            TA1                                 R1
              54            TA2                                 R2
              55            TA3                                 R3
              56            TA4                                 R4
               3            TA5                              R5 (MSB)
               4            TA6                              G0 (LSB)
               6            TB0                                 G1
               7            TB1                                 G2
              11            TB2                                 G3
              12            TB3                                 G4
              14            TB4                              G5 (MSB)
              15            TB5                              B0 (LSB)
              19            TB6                                 B1
              20            TC0                                 B2
              22            TC1                                 B3
              23            TC2                                 B4
              24            TC3                              B5 (MSB)
              27            TC4                                (NA)
              28            TC5                                (NA)
              30            TC6                                 DE
              50            TD0                                GND
               2            TD1                                GND
               8            TD2                                GND
              10            TD3                                GND
              16            TD4                                GND
              18            TD5                                GND
              25            TD6                                (NA)

                                                                    1 cycle

RXCKIN+

RXCKIN-



 RXIN0+
 RXIN0-


 RXIN1+
 RXIN1-


 RXIN2+
 RXIN2-
 DE : Display Enable
4-3 Interface block diagram                                                                                                     LD-18322B-7

                       (Computer Side)                                                                         (TFT-LCD side)
  8Bit Mode
LVDS_SET=L (20 pin=GND or OPEN)


       Controll                       THC63LVDM83R
                                                                             Single LVDS interface contained in a control
                       7                                          RX0+(6)                          RA 0 - 6
         R0-R5,G0          TA 0 - 6
                       7                                          RX0-(5)                                           RB 0 - 6




                                                                                        LVDS-TO-PARALLEL TTL
       G1-G5,B0,B1         TB 0 - 6




                                           TTL PARALLEL-TO-LVDS
                       7                                          RX1+(9)                                           RC 0 - 6
                           TC 0 - 6
   B2-B5, NA,NA,DE
                       7                                          RX1-(8)                                           RD 0 - 6
                           TD 0 - 6




                                                                                                                                     Internal circuits
       R6,R7,G6,G7,
        B6,B7,NA                                                  RX2+(12)

                                                                  RX2-(11)

                                                                  RX3+(18)
                                                                  RX3-(17)


                                                                  CK+(15)
                            C K IN                                                                                  CK OUT
                  CK                     PLL                       K-(14)            PLL




  8Bit Mode
LVDS_SET=H (20 pin=3.3[V])


       Controll                       THC63LVDM83R
                                                                             Single LVDS interface contained in a control IC
                       7                                          RX0+(6)                          RA 0 - 6
         R2-R7,G2          TA 0 - 6
                                                                  RX0-(5)
                                                                                        LVDS-TO-PARALLEL TTL


                       7   TB 0 - 6                                                                                 RB 0 - 6
       G3-G7,B2,B3
                                          TTL PARALLEL-TO-LVDS




                       7                                          RX1+(9)                                           RC 0 - 6
                           TC 0 - 6
   B4-B7, NA,NA,DE
                       7                                          RX1-(8)                                           RD 0 - 6
                           TD 0 - 6




                                                                                                                                    Internal circuits
       R0,R1,G0,G1,
        B0,B1,NA                                                  RX2+(12)

                                                                  RX2-(11)

                                                                  RX3+(18)
                                                                  RX3-(17)


                                                                  CK+(15)
                           C K IN                                                                                   CK OUT
                  CK                     PLL                       K-(14)            PLL




  6Bit Mode
LVDS_SET=H (20 pin=3.3[V])


       Controll                       THC63LVDM83R
                                                                             Single LVDS interface contained in a control IC
                       7                                          RX0+(6)                          RA 0 - 6
         R0-R5,G0          TA 0 - 6
                                                                  RX0-(5)
                                                                                        LVDS-TO-PARALLEL TTL




                       7   TB 0 - 6                                                                                 RB 0 - 6
       G1-G5,B0,B1
                                           TTL PARALLEL-TO-LVDS




                       7                                          RX1+(9)                                           RC 0 - 6
                           TC 0 - 6
   B2-B5, NA,NA,DE
                       7                                          RX1-(8)                                           RD 0 - 6
                           TD 0 - 6
                                                                                                                                     Internal circuits




      GND   6,NA
                                                                  RX2+(12)

                                                                  RX2-(11)

                                                                  RX3+(18)
                                                                  RX3-(17)


                                                                  CK+(15)
                            C K IN                                                                                  CK OUT
                  CK                     PLL                       K-(14)            PLL
                                                                                                         LD-18322C-8

4-4. Backlight
 CN 2, 3, 4, 5
      The module-side connector       BHSR-02VS-1                    (JST)
      The user-side connector                 SM02B-BHSS-1-TB                   (JST)
    Pin no.      symbol                             Function
       1            H        Power supply for lamp             (High voltage side)
       2         GND         Ground




5. Absolute Maximum Ratings                   2
                 Parameter               Symbol           Condition                       Ratings       Unit   Remark
    Supply voltage                           Vcc           Ta=25                      0        + 4.0
    Storage temperature                      TSTG                                       25       + 60          Note1
    Operating temperature                    TOPA        Panel surface                    0   +60
  Note1    Humidity       95%RH Max.     ( Ta       40     )
                          Maximum wet-bulb temperature at 39             or less.    ( Ta>40        )
                          No condensation.
                                                                                                                  LD-18322C-9
6. Electrical Characteristics
6-1. TFT-LCD panel driving                                                                                 Ta    25
                       Parameter                     Symbol   Min.        Typ.   Max.        Unit           Remark
      Power          Supply voltage              Vcc          +3.0        +3.3    +3.6        V             Note1
   Supply            Current dissipation         Icc                      630     850         mA            Note2
       Permissive input ripple voltage           VRF                              100        mVp-p     Vcc=+3.3V
       Terminate Resister                        RT                       100
       Input voltage (High)                          VIH                          100         mA
       Input voltage (Low)                           VIL      -100                            mA


  Note1   3
  1 On-off sequences of Vcc and                        Vcc                                                                 Vcc
                                                                     2.8V                            2.8V
  data
           0     t1       60ms                       LVDS                                                              LVDS
           0     t2       50ms                                                               0.3V
                                                                                 0.3V
           0     t3       50ms
                 t4       100ms                                 t3                      t4            t1         t2




  2    Dip conditions for supply voltage


           1)        V2     Vcc     V1
                td        10ms
                                                              V1 : 3.0V
           2)        Vcc    V2
                                                              V2 : 2.4V                                     V2        V1
                     Vcc-dip conditions should also
                     follow the on-off conditions.




  Note2         Typical current situation : 253-gray-bar pattern
                Vcc=+3.3V, CK=65MHz
                Gray scale : GS(n)
                                  n=0    252
               The explanation of each gray scale, GS(n), is described
               below section 8.
                                                                                                      LD-18322C-10
6-2. Backlight
        The back light system is an edge-lighting type with 4 CCFTs (Cold Cathode Fluorescent Tube).
        The characteristics of the lamp are shown in the following table.
        The value mentioned below is at the case of one CCFT.
       CCFT Model Name         KTBE222MSTF-320MA262-Z (STANLEY ELECTRIC CO., LTD.
          Parameter            Symbol  Min.    Typ.   Max.    Unit           Remark
 Lamp current range              IL     3.5    6.5     7.5  mArms Note1
 Lamp voltage                    VL            615     700   Vrms Ta=25 ,IL=6.5mArms
 Lamp power consumption          PL            4.0     4.55   W     Note2 ,IL=6.5mArms
 Lamp frequency                  FL     40      60      70   KHz    Note3
 Kick-off voltage                Vs                   1080   Vrms Ta=25     Note4
                                                      1480   Vrms Ta=0     Note4
 Lamp life time                  TL   50,000                 Hour IL=6.5mArms    Note5

  Note1     A lamp can be light in the range of lamp current shown above.
           Maximum rating for current is measured by high frequency current measurement equipment
           connected to VLOW at circuit showed below.
            (Note : To keep enough kick-off voltage and necessary steady voltage for CCFT.)
           Lamp frequency : 40 70kHz
           Ambient temperature : 0 50




  Note2       Referential data per one CCFT by calculation ( IL       VL ) .
             The data does not include loss at inverter .
   Note3      Lamp frequency of inverter may produce interference with horizontal synchronous frequency, and
           this may cause horizontal beat on the display. Therefore, adjust lamp frequency, and keep inverter as far
           as from module or use electronic shielding between inverter and module to avoid interference.
   Note4 Kick-off voltage value is described as the index in the state of lamp only.
           The kick-off voltage is estimated to be risen up as approx. +200V in the state of module only, and the
           further rise up can be seen according to the assembling status of user cabinet. Please set the kick-off
           voltage of inverter to avoid the lighting failures in the state of operation. Please design the inverter so
           that its open output voltage can be connected for more than 1 second to startup. Otherwise, the lamp
           may not be turned on. But, please set as 100ms when the ambient luminance around the lamp is more
           than 1lux.
   Note5      Lamp life time is defined as the time when either      or      occurs in the continuous operation under
           the condition of Ta=25      and the lamp current value indicated to the Remark .
                      Brightness becomes 50% of the original value under standard condition.
                      Kick-off voltage at Ta=0     exceeds maximum value,1480Vrms .
   Note6
   The performance of the backlight, for example lifetime or brightness, is much influenced by the characteristics
of the DC-AC inverter for the lamp. When you design or order the inverter, please make sure that a poor lighting
caused by the mismatch of the backlight and the inverter (miss-lighting, flicker, etc.) never occurs. When you
confirm it, the module should be operated in the same condition as it is installed in your instrument.
   Use the lamp inverter power source incorporating such safeguard as overvoltage / overcurrent protective circuit
or lamp voltage waveform detection circuit, which should have individual control of each lamp.
   In case one circuit without such individual control is connected to more than two lamps, excessive current may
flow into one lamp when the other one is not in operation.
   Note7 Under the environment of 10lx or less, miss-lighting delay may occur.
                                                                                                       LD-18322C-11
7. Timing characteristics of input signals
 7-1. Timing characteristics


            Parameter               Symbol             Min.          Typ.         Max.        Unit      Remark
  Frequency                           1/Tc              60            65           85         MHz
  Horizontal period                    TH              1056         1344          1720        clock
                                                       16.0          20.7         23.4         



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