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Panel_SHARP_LQ255T3LZ14_0_[DS]


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                                                                                                                       LD-16405-1
         1. Application
            This specification applies to the color TFT-LCD module LQ255T3LZ14.

         * These specification sheets are proprietary products of SHARP CORPORATION ("SHARP") and include materials
         protected under copyright of SHARP. Do not reproduce or cause any third party to reproduce them in any form or by
         any means, electronic or mechanical, for any purpose, in whole or in part, without the express written permission of
         SHARP.

         * The device listed in these specification sheets was designed and manufactured for use in AV equipment.

         * In case of using the device for applications such as control and safety equipment for transportation (aircraft, trains,
         automobiles, etc.), rescue and security equipment and various safety related equipment which require higher
         reliability and safety, take into consideration that appropriate measures such as fail-safe functions and redundant
         system design should be taken.

         * Do not use the device for equipment that requires an extreme level of reliability, such as aerospace applications,
         telecommunication equipment (trunk lines), nuclear power control equipment and medical or other equipment for
         life support.

         * SHARP assumes no responsibility for any damage resulting from the use of the device which does not comply with
            the instructions and the precautions specified in these specification sheets.

         * Contact and consult with a SHARP sales representative for any questions about this device.

         2. Overview
         This module is a color active matrix LCD module incorporating amorphous silicon TFT (Thin Film Transistor). It is
         composed of a color TFT-LCD panel, driver ICs, control circuit, power supply circuit, inverter circuit and back light
         system etc. Graphics and texts can be displayed on a 1366 RGB 768 dots panel with 16,777,216 colors by
         using LVDS (Low Voltage Differential Signaling) to interface, +5V of DC supply voltages and +12V of DC supply
         voltage for back light.
         This module also includes the DC/AC inverter to drive the CCFT .
         And in order to improve the response time of LCD, this module applies the O/S (over shoot) driving technology for
         the control circuit .In the O/S driving technology, signals are being applied to the Liquid Crystal according to a
         pre-fixed process as an image signal of the present frame when a difference is found between image signal of the
         previous frame and that of the current frame after comparing them.
         By using the captioned process, the image signals of this LCD module are being set so that image response can be
         completed within one frame, as a result, image blur can be improved and clear image performance can be realized.


         3. Mechanical Specifications
                            Parameter                                  Specifications                       Unit
                Display size                                        64.8 Diagonal                            cm
                                                                    25.5 Diagonal                           inch
                  Active area                                      564.8 (H) x 317.6 (V)                    mm
                  Pixel Format                                       1366 (H) x 768 (V)
                                                                                                            pixel
                                                                  1pixel = R + G + B dot
                  Pixel pitch                                     0.4135(H) x 0.4135 (V)                    mm
                  Pixel configuration                              R, G, B vertical stripe
                  Display mode                                         Normally black
                  Unit Outline Dimensions *1                  646.0(W) x 373.0(H) x 51.0(D)                 mm
                  Mass                                                   6.7 +/- 0.3                        kg
                  Surface treatment                    Anti glare, low reflection coating
                                                       Hard coating: 2H
                                                       Haze: 23 +/- 5%

         (*1 )Outline dimensions are shown in Fig.1




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                                                                                                            LD-16405-2
         4. Input Terminals
            4-1. TFT panel driving
           CN1 (Interface signals and +5V DC power supply) (Shown in Fig.1)
            Using connector        FI-X30SSL-HF (Japan Aviation Electronics Ind. , Ltd.)
             Mating connector FI-X30H,FI-X30C or FI-X30M (Japan Aviation Electronics Ind. , Ltd.)
             Mating LVDS transmitter THC63LVDM83A or equivalent device
               Pin No.          Symbol                              Function                          Remark
                   1             VCC          +5V Power Supply
                   2             VCC          +5V Power Supply
                   3             VCC          +5V Power Supply
                   4             VCC          +5V Power Supply
                   5             GND
                   6             GND
                   7             GND
                   8             GND
                   9          SELLVDS         Select LVDS data order        Note1                       Pull up
                                                                                                   Default H:3.3V
                  10                 NC
                  11             GND
                  12            RIN0-       Negative (-) LVDS differential data input                  LVDS
                  13            RIN0+       Positive (+) LVDS differential data input                  LVDS
                  14             GND
                  15            RIN1-       Negative (-) LVDS differential data input                  LVDS
                  16            RIN1+       Positive (+) LVDS differential data input                  LVDS
                  17             GND
                  18            RIN2-       Negative (-) LVDS differential data input                  LVDS
                  19            RIN2+       Positive (+) LVDS differential data input                  LVDS
                  20             GND
                  21           CLKIN-       Clock   Signal(-)                                          LVDS
                  22           CLKIN+       Clock   Signal(+)                                          LVDS
                  23             GND
                  24            RIN3-       Negative (-) LVDS differential data input                  LVDS
                  25            RIN3+       Positive (+) LVDS differential data input                  LVDS
                  26             GND
                  27                 R/L    Horizontal shift direction      Note 2
                  28             U/D        Vertical shift direction      Note 2
                  29            TEST1        Fix to GND level usually.
                  30            TEST2        Fix to GND level usually .
             Note
               1. Shield case on the back surface of module contacts to GND of internal circuit.
               2. It is recommend to connect all the GND terminals because of stable operation.




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                                                                                              LD-16405-3




          Note1   SELLVDS


                   Transmitter                     SELLVDS
              Pin No         Data        =L(GND)         =H(3.3V) or Open
                51           TA0         R0(LSB)               R2
                52           TA1            R1                 R3
                54           TA2            R2                 R4
                55           TA3            R3                 R5
                56           TA4            R4                 R6
                 3           TA5            R5              R7(MSB)
                 4           TA6         G0(LSB)               G2
                 6           TB0            G1                 G3
                 7           TB1            G2                 G4
                11           TB2            G3                 G5
                12           TB3            G4                 G6
                14           TB4            G5              G7(MSB)
                15           TB5         B0(LSB)               B2
                19           TB6            B1                 B3
                20           TC0            B2                 B4
                22           TC1            B3                 B5
                23           TC2            B4                 B6
                24           TC3            B5              B7(MSB)
                27           TC4           NA                  NA
                28           TC5           NA                  NA
                30           TC6            DE                 DE
                50           TD0            R6               R0(LSB)
                 2           TD1         R7(MSB)               R1
                 8           TD2            G6              G0(LSB)
                10           TD3         G7(MSB)               G1
                16           TD4            B6               B0(LSB)
                18           TD5         B7(MSB)               B1
                25           TD6           NA                  NA




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                                                                                                                                                                     LD-16405-4




         Interface block diagram
         Corresponding Transmitter:THC63LVDM83A(THine).

                                              ( TV side )
                                                                                                                                             (TFT LCD side)
                                       8                                                        RIN0+(13)
                       R0    R7
                                                                                                                                                      8
                                       8                                                        RIN0-(12)                                                 R0        R7
                       G0   G7
                                                                                                RIN1+(16)                                             8
                                       8                                                                                                                  G0        G7
                       B0   B7
                                                                        LVDS                                                                          8
                                                                                                RIN1-(15)              TTL                                B0        B7




                                                                                                                                                                            Internal circuits
                                                                                                RIN2+(19)
                                                                                                RIN2-(18)
                                                                        TTL
                                                                                                                      LVDS
                                                                                                RIN3+(25)
                            ENAB
                                                                                                RIN3-(24)                                                 ENAB

                                                                                                CLKIN+(22)
          controller
                             CLK                                        PLL                                           PLL
                                                                                                CLKIN-(21)                                                    CLK




         Input block diagram


                             Inpu t Signal
                             CLKIN+
                             CLKIN-
                             RIN0-
                             RIN0+                          Control PWB                                              Sou rc e Driver
                             RIN -
                             RIN +
                                                                          Control Signal




                             RIN2-
                                                            CN




                             RIN2+
                             RIN3-
                                                            CN2




                             RIN3+
                                                                                                  Gate Driver




                             R/L                                                                                LCD PANEL
                             U/D                                                                                 366 3(RGB)            768
                             SELLVDS
                                                                                                                *panel back
                             Frame                          Power Supply
                             O/Sset                         Circuit
                             Temp 3
                             Temp 2
                             Temp

                             Po wer Supply                                                                           Back Light(CCFT)
                             +5V DC                                 Inverter
                                                                  CN3      CN4,5
                             In put Sign al
                             VON
                             VBRT
                             Powe r Supply
                             + 2V DC




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                                                                                              LD-16405-5




         SELLVDS= Low(GND)

                                                     1 cycle


         CLKIN+

         CLKIN-

         RIN0+
                           R1     R0    G0     R5         R4   R3   R2     R1     R0     G0
         RIN0-



         RIN1+             G2     G1    B1     B0         G5   G4   G3     G2     G1     B1

         RIN1-

         RIN2+             B3     B2    DE     NA         NA   B5   B4     B3     B2     DE
         RIN2-

         RIN3+
                           R7     R6     NA    B7         B6   G7   G6     R7     R6     NA
         RIN3



         SELLVDS= High(3.3V) or Open

                                                     1 cycle


         CLKIN+

         CLKIN-



         RIN0+             R3     R2    G2      R7        R6   R5   R4     R3     R2     G2
         RIN0-

         RIN1+
                           G4     G3    B3      B2        G7   G6   G5     G4     G3     B3
         RIN1-



                           B5     B4    DE      NA        NA   B7   B6     B5     B4     DE




                           R1     R0     NA     B1        B0   G1   G0     R1     R0     NA

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                                                                                                                       LD-16405-6


         RIN2+
         RIN2-

         RIN3+
         RIN3-

         DE: Display Enable
         NA: Not Available (Fixed Low)

           Note 2
                            Normal (Default)                                    Reversed image with horizontal
                                                :




                       Reversed image with vertical                         Reversed image with horizontal and vertical
                                                :                                                           :




         CN2(O/S control) -(Shown in Fig 1)
             OS Driving Pin No. and function
                 Using connector : SM07B-SRSS-TB-A (JST)
                    Mating connector : SHR-07V-S or SHR-07V-S-B JST
                                                                                                          0: (GND) ,1: (3.3V)
                 Pin No.     Symbol                              Function                                    Default
                   1         Frame       Frame frequency setting             1:60Hz, 0:50Hz      Pull down(10k ohm)
                   2         O/Sset      O/S operation setting      1:OS_ON, 0:OS_OFF            Pull down(10k ohm) Note 1
                   3         TEST3       Fix to GND level usually .                              Pull down(30k ohm) Note 1
                   4         Temp3       Data3 of panel surface temperature                      Pull down(10k ohm)
                   5         Temp2       Data2 of panel surface temperature                      Pull down(10k ohm)
                   6         Temp1       Data1 of panel surface temperature                      Pull down(10k ohm)




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                                                                                                                     LD-16405-7
                 7           GND
               Note 1    In case of O/S set setting "0"(O/S_OFF), it should be set the Temp1~3 to "0".




                According as the surface temperature of the panel, enter the optimum 3 bit signal into pin No.4,5,6.
              Measuring the correlation between detected temperature by the sensor on PWB in users side and actual surface
              temperature of panel at center , convert the temperature detected by the sensor to the surface temperature of
              panel to enter the 3 bit temperature data.

                                                       Surface temperature of panel
               Pin no.    0-5        5-10      10-15      15-20      20-25      25-30      30-35         35    and
                                                                                                           above
                  4         0           0         0         0         1       1               1              1
                  5         0           0         1         1         0       0               1              1
                  6         0           1         0         1         0       1               0              1
             *0 : Low level voltage(0V)          1 : High level voltage(3.3V)
             *For overlapping temperatures (such as 5 ,10 ,15 ,20 ,25 , 30 ,35            ) select the optimum parameter,
              judging from the actual picture image.


         4-2. Backlight driving
           CN3 (Inverter control)     Using connector: S6B-PH-SM3-TB(JST) Mating connector: PHR-6 (JST)
                  Pin No.        Symbol                  Function              Remark
                     1           VON/OFF             Inverter control          Note 1
                     2            VSEL           Fix to 5V level usually.
                     3          Reserved                  OPEN
                     4            VBRT             Brightness Control          Note 2
                     5          Reserved                  OPEN
                     6            GND          Fix to GND level usually.
                *Shield case on the back surface of module doesn't contact to GND of internal circuit

               Note 1     VON/OFF (Inverter control)
                               Input voltage                        Function
                                    5V                            Inverter: ON
                                    0V                            Inverter: OFF



               Note 2     VBRT (Brightness Control)




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                                                                                                                    LD-16405-8
                    PWM Brightness Control is regulated by analog input voltage (0V to 5V) .
                     Input voltage                                        Function
                            5V                         Brightness Control : Dark (PWM duty : 15%)
                            0V                      Brightness Control : Bright (PWM duty : 100%)




              CN4,CN5 (Inverter Power input Pin layout)                        Using connector: B10B-PH-SM3-TB (JST)
                                                                                        Mating connector: PHR-10 (JST)
                             Pin No.       Symbol                               Function
                                 1          VINV                                     +12V
                                 2          VINV                                     +12V
                                 3          VINV                                     +12V
                                 4          VINV                                     +12V
                                 5          VINV                                     +12V
                                 6          GND                                      GND
                                 7          GND                                      GND
                                 8          GND                                      GND
                                 9          GND                                      GND
                                 10         GND                                      GND
                         * Shield case on the back surface of module doesn't contact to GND of internal circuit

         4-3. Lamp characteristics
              The back light system is direct type with 14 CCFTs (Cold Cathode Fluorescent Tube).
              The characteristics of the lamp are shown in the following table. The value mentioned below is at the case of
              one CCFT.
                                      CCFT type : HARISON TOSHIBA LIGHTING, Corp./ WEST ELECTRIC CO.,LTD
                     Item         Symbol        Min.               Typ.              Max.         Unit            Remarks
                 Life time            TL       60000                -                  -          Hour             Note 1
              Note 1 Above value is applicable when the long side of LCD module is placed horizontally (Landscape
                        position). (Lamp lifetime may vary if LCD module is in portrait position due to the change of
                        mercury density inside the lamp.)
                        Lamp life time is defined as the time when brightness becomes 50% of the original value          in the
                        continuous operation under the condition of Ta=25       and brightness control(VBRT=0V).


                     Parameter             Symbol           Condition                Ratings          Unit      Remark




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                                                                                                               LD-16405-9
                  Input voltage          VI         Ta=25                   -0.3 ~ 3.6               V       Note 1
                  (for Control)
               5V supply voltage        VCC         Ta=25                       0~+6                 V
                 (for Control)
                  Input voltage        VBRT         Ta=25                       0~+6                 V
                  (for Inverter)      VON/OFF
                                        VSEL
               12V supply voltage       VINV        Ta=25                       0 ~ +14              V
                 (for Inverter)
               Storage temperature      Tstg               -                -25 ~ +60
              Operation temperature     Topa               -                    0 ~ +50                      Note 2
                   (Ambient)
              Note 1 SELLVDS, R/L, U/D,TEST1, TEST2, TEST3, Frame, O/S set, Temp1, Temp2, Temp3
              Note 2 Humidity 95%RH Max.(Ta 40 )
                      Maximum wet-bulb temperature at 39       or less.(Ta>40     )       No condensation.




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                                                                                                                                  LD-16405-10
         6. Electrical Characteristics
           6-1. Control circuit driving                                                                                     Ta=25
                          Parameter          Symbol       Min.      Typ.                    Max.          Unit              Remark
                               Supply voltage Vcc         +4.5      +5.0                    +5.5           V                Note 1
                +5V supply
                                   Current     Icc         -        1.6                      2.4           A                Note 2
                  voltage
                                 dissipation
                   Permissible input ripple   VRP          -           -                     100          mVP-P       Vcc = +5.0V
                           voltage
                Differential input     High   VTH           -          -                     100          mV         VCM = +1.2V
                threshold voltage      Low    VTL         -100         -                      -           mV           Note 6
                     Input Low voltage         VIL          -          -                     1.0           V
                                                                                                                            Note 3
                     Input High voltage        VIH         2.3                               3.3           V
                                                                                                                       VI = 0V
                                                  IIL1     -           -                     100           A
                                                                                                                       Note 4
                  Input leak current (Low)
                                                                                                                       VI = 0V
                                                  IIL2     -           -                     400           A
                                                                                                                       Note 5
                                                                                                                      VI =3.3V
                                                  IIH1     -           -                     100           A
                                                                                                                       Note 4
                  Input leak current (High)
                                                                                                                      VI =3.3V
                                                  IIH2     -           -                     400           A
                                                                                                                       Note 5
                  Terminal resistor       RT      -                 100                          -                Differential input
           Note VCM: Common mode voltage of LVDS driver.

                                                                           0.9VCC
           Note 1                                                                                                 0.9Vcc


             1) Input voltage sequences                            0.1Vcc
                                                                 Vcc
                                                                                                                     0.1Vcc
                                                                                                                               0.1Vcc
                                                                                    t2-1
                                                                                                                       t4
                                                                             t1                              t3
             0 t1        10ms 0     t2-1   20ms                  Data1



                                                                                    t2-2
             t2-2    10ms      0   t3 1s
                                                                 Data2
                                                                                            t5       ON
             t4     1s   200ms     t5
                                                                 Back light:Vinv           OFF                        OFF



             Data1 : CLKIN RIN0  RIN1   RIN2    RIN3
             Data2 R/L U/D SELLVDS Frame O/Sset Temp1,2,3



         2) Dip conditions for supply voltage
           a) 2.7V       Vcc < 4.5V

             td      10ms

           b) Vcc < 2.7V
               Dip conditions for supply voltage is
               based on input voltage sequence.




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                                                                                                              LD-16405-11




           Note 2 Typical current situation: 256 gray-bar pattern (Vcc = +5.0V)
                     The explanation of RGB gray scale is seen in section 8.



                                                                           Vcc 5.0V
                                                                           CK 82.0MHz
                                                                           Th 20.67 s




           Note 3 R/L, U/D, SELLVDS, TEST1, TEST2, TEST3, Frame, O/Sset, Temp1, Temp2, Temp3
           Note 4 R/L, U/D
           Note 5 SELLVDS, TEST1, TEST2, TEST3, Frame, O/Sset, Temp1, Temp2, Temp3
           Note 6 CKIN , RIN0 ,RIN1 , RIN2 , RIN3

         6-2. Inverter driving for back light
           The back light system is under-lighting type with 14 CCFTs (Cold Cathode Fluorescent Tube).
                                                                                                                  Ta=25
                   Parameter                Symbol           Min.   Typ.      Max.   Unit                Remark
                                              IINV1           -     8.0       8.8       A            VINV = 12V
                 Current dissipation                                                            VBRT = 0V, VON/OFF=5V
           12V
                                              IINV2           -     6.1       6.7       A               Note 4
                   Supply voltage             VINV           11.0   12.0      13.0      V                Note 1
            Permissible input ripple
                                                  VRF         -      -        200    mVp-p           VINV = +12V
                   voltage
             Input voltage (Low)             VONL             0      -        1.0       V               Note2
                                             VONH                                                 Input Impedance
                                                             3.0    5.0       6.0       V
             Input voltage (High)                                                                       24K
                                              VSEL           3.0    5.0       6.0       V      Input Impedance 20K
           Brightness control voltage         VBRT            0                5        V               Note3
                                                                                                  Input Impedance
           Brightness control voltage                        95                15       %
                                                                                                       112K
                      Vs
               Burst Duty Ratio

           Note 1 1)VINV-turn-on condition


                                        0.9VINV

                                 0V
                          INV


                                              T1        T2

                          ON     0V




                                        T1 100 s




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                                                                                                                       LD-16405-12
                                        T2 1ms




                       2) VINV-turn-off condition

                             INV
                                                                             T1
                             ON                                                                   0V

                                                                                              0V


                                        T1 1ms

           Note 2 VON
           Note 3 VBRT
           Note 4 IINV 1: The current value of less than 1 hour after switching on the light.
                   IINV 2: The current value after 1 hour or more have passed since the light was switched on the light.

           Note      The performance of the backlight, for example life time or brightness, is much influenced
                    by the characteristics of the power supply for the inverter. When you design or order the power supply
                    for the inverter, please make sure that a poor lighting caused by the mismatch of the backlight and
                    the inverter (miss-lighting, flicker, etc.) never occur. When you confirm it, the module should be operated
                    in the same condition as it is installed in your instrument. Also, the power supply for the inverter use the
                    one which has safe protection circuits such as the circuit of the detection of the overvoltage / the
                    overcurrent.


         7. Timing characteristics of input signals
            7-1. Timing characteristics
            Timing diagrams of input signal are shown in Fig.2
                            Parameter                     Symbol      Min.        Typ.      Max.       Unit
              Clock         Frequency                      1/Tc        65          82         85       MHz
                                                            TH        1560        1696      1940       clock
                                Horizontal period
                                                                      17.0        20.68       -         s
           Data enable
                            Horizontal period (High)       THd        1366        1366      1366       clock
             signal
                            Vertical period                 TV         778        806        972       line
                            Vertical period (High)         TVd         768        768        768       line
             Note      It is recommend inputting a signal, after turning on a module back light.
             Note1       When vertical period is very long, flicker and etc. may occur.
                         It is recommend making sure that length of vertical period is an integral multiple of horizontal length
                         of period. Otherwise, the screen may not display properly.
             Note2       Cut off the power supply after you make it black screen indications.




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                                                                                             LD-16405-13




                                                TH


                                                                THd

           DE



           DATA         1366                     1      2                       1366

           (R,G,B)




                         Tc


                                                            1         2         767    768

           DE


                                                                          TVd
                                                 TV




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                                                                                                                                                             LD-16405-14
         7-2. Input data signal and display position on the screen



                                          R1 G1 B1 R2 G2 B2




                                                                                    R G B




         8. Input Signal, Basic Display Colors and Gray Scale of Each Color
                                                                                                      Data signal
                             Colors &
                                          Gray    R0   R1   R2   R3       R4   R5   R6   R7 G0   G1    G2   G3       G4   G5   G6   G7   B0   B1   B2   B3       B4   B5   B6   B7
                             Gray scale
                                          Scale

                               Black              0    0    0    0        0    0    0    0   0   0     0    0        0    0    0    0    0    0    0    0        0    0    0    0

                               Blue               0    0    0    0        0    0    0    0   0   0     0    0        0    0    0    0    1    1    1    1        1    1    1    1

                               Green              0    0    0    0        0    0    0    0   1   1     1    1        1    1    1    1    0    0    0    0        0    0    0    0
         Basic Color




                               Cyan               0    0    0    0        0    0    0    0   1   1     1    1        1    1    1    1    1    1    1    1        1    1    1    1

                                Red               1    1    1    1        1    1    1    1   0   0     0    0        0    0    0    0    0    0    0    0        0    0    0    0

                             Magenta              1    1    1    1        1    1    1    1   0   0     0    0        0    0    0    0    1    1    1    1        1    1    1    1

                              Yellow              1    1    1    1        1    1    1    1   1   1     1    1        1    1    1    1    0    0    0    0        0    0    0    0

                               White              1    1    1    1        1    1    1    1   1   1     1    1        1    1    1    1    1    1    1    1        1    1    1    1

                               Black      GS0     0    0    0    0        0    0    0    0   0   0     0    0        0    0    0    0    0    0    0    0        0    0    0    0

                                 



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