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5 4 3 2 1
Rocky40/50 Discrete VGA Block Diagram
2007/12/20
CPU Thermal Sensor
D Intel Penryn G780 50
D
(Socket P) 3,4 CLOCK GEN.
GDDR3 VRAM*2 FSB CS9LPRS365BGLF-T 29
(16*32M) 800/1067
2*64=128MB MHz FAN
72 50
Cantiga
LVDS CON LVDS
PM DDRII
46 DDRII
SODIMM 7,8
CRT CRT
nVIDIA PCIE x16
x4 DMI
45
NB9M-GS
HDMI
34 x 34mm
DDRII DDRII
HDMI 1329 FCBGA
48 70~75
SODIMM 7,8
C 10~15 HP JACK C
HDA
DMI AUDIO MIC JACK
X4 CODEC
USB#4 USB#3 USB#2 USB#1 USB#0 AMP Speaker
CAMERA CON CON CON CON HDA Conexant
53 53 53 52 52
ICH9M CX20561
Int DMIC
USB2.0
USB#5 USB#6 USB#10 USB#11 USB#8 USB#7 USB 2.0 (12 ports)
36
WWAN UWB BT FP
NEW
WLAN
SATAII(4 Ports) DAA RJ11
53 59 61 31 CARD 53 53 AZALIA HD AUDIO
6 X1 PCIE IF AMoM
SPI I/F SATA0 HDD 51
PCI bus(4)
NEW LPC I/F SATA1 ODD 51
SIM MiniCard MiniCard INT RTC
CARD
B CARD 53 Robson 59 53 WLAN 53 10/100/1000 Gbe MAC B
31mm x 31mm
SPI
SPI ROM
PCIE Interface 25
20~24
GigaLAN 3.3V LPC,33MHZ Ricoh IEEE 1394a 42
REALTEK PCI BUS R5C833
40~42
Card Reader 42
RTL8111C 53
EC
IT 8752 30,31
A
Support Energy Star V4.0 A
PS/2
Transformer
RJ45 SWAP SPI SMS TOUCH TRACK
ROM KBD ADXL323
NS892402 53 30 31 58
PAD 31 POINT 31
Title : Block Diagram
Engineer: Tina Lee
Size Project Name Rev
Custom Rocky 40/50 1.0
Date: Thursday, December 20, 2007 Sheet 1 of 94
5 4 3 2 1
A B C D E
Rocky 40/50 Schematic Index
Page System page Ref. ICH9-M GPIO Use As Signal Name Power EC GPIO Use As Signal Name Power EC GPIO Use As Signal Name Power
01 Block Diagram GPIO 00 GPI PM_SYNC# +3VS GPA0 GPO PWR_LED# - - -
1 02 Schematic Information GPIO 01 GPI - +3VS GPA1 GPO CHG_LED# GPG6 GPO - 1
03-05 CPU-Penryn GPIO [2:5] GPI PCI_INT[E:H]# +3VS GPA2 GPO BATSEL_3S# - - -
07-09 DDR III SO-DIMM GPIO 06 GPI +3VS GPA3 - NOVO_CARE_LED# GPH0 OD PM_CLKRUN#
10-15 Cantiga GPIO 07 GPI +3VS GPA4 GPO LCD_BL_PWM GPH1 ALT 3G_ON#
20-24 ICH9M GPIO 08 GPI EXT_SMI# +3VSUS GPA5 GPO FAN_PWM GPH2 ALT LOGO_LED#
25 SPI ROM GPIO 09 Native UWB_ON +3VSUS GPA6 GPO - GPH3 GPO BAT_LEARN
29 CLK-ICS9LPRS365BGLFT GPIO 10 GPI - +3VSUS GPA7 GPO - GPH4 GPO -
30-31 EC_IT8752 GPIO 11 Native EXT_SCI# +3VSUS GPB0 GPO CHG_EN# GPH5 GPO NUM_LED#
32 POWER-ON SEQUENCE GPIO 12 GPO - +3VSUS GPB1 GPO PRECHG GPH6 GPO CAP_LED#
33 LAN_RTL811C*** GPIO 13 GPI CB_SD# +3VSUS GPB2 GPI - - - -
34 RJ45*** GPIO 14 GPI RTLAN_DSM# +3VSUS GPB3 ALT SMB0_CLK GPI0 GPI NV_OVERT#
35 MDC*** GPIO 15 Native - +3VSUS GPB4 ALT SMB0_DAT GPI1 GPI SUS_PWRGD
36 CODEC-CX20561 GPIO 16 Native PM_DPRSLPVR +3VS GPB5 OD A20GATE GPI2 GPI ALL_SYSTEM_PWRGD
2 37 AUDIO_AMP-G1431F2U GPIO 17 GPI WLAN_LED +3VS GPB6 OD RCIN# GPI3 GPI VRM_PWRGD 2
38 MICROPHONE & SPEAKER CONN GPIO 18 GPO - +3VS GPB7 GPO PM_RSMRST# GPI4 GPI XOUT
39 DSP*** GPIO 19 GPI - +3VS GPC0 GPI - GPI5 GPI YOUT
40 CARDBUS R5C833(PCI I/F) GPIO 20 GPO - +3VS GPC1 ALT SMB1_CLK GPI6 GPI -
41 CARDBUS R5C833(1394 & SD) GPIO 21 GPI - +3VS GPC2 ALT SMB1_DAT GPI7 GPI -
42 IEEE1394A & 4 IN1 CON GPIO 22 GPI BT_DET# +3VS GPC3 GPO PM_PWRBTN# GPJ0 GPO EC_CLK_EN
43 NewCard PWR SW & CON*** GPIO 23 Native - +3VS GPC4 ALT AC_IN_OC# GPJ1 GPO PM_PWROK
44 Debug GPIO 24 GPO WLAN_ON +3VSUS GPC5 GPO OP_SD# GPJ2 GPI -
45 CRT GPIO 25 Native - +3VSUS GPC6 ALT BAT1_IN_OC# GPJ3 - -
46 LVDS & INVERTER CONNECTOR GPIO 26 Native - +3VSUS GPC7 GPO RFON_SW# GPJ4 GPO BL_DA
47 TV OUT CONN*** GPIO 27 GPO BT_ON +3VSUS GPD0 GPI PWRLIMIT# GPJ5 GPO PWR_LED#
50 THER SENSOR & FAN GPIO 28 GPO - +3VSUS GPD1 ALT PM_SUSC# GPK0 GPI -
51 HDD & CDROM GPIO 29 Native USB_OC5# +3VSUS GPD2 ALT BUF_PLT_RST# GPK1 GPI -
3 3
52 USB Port x 2 GPIO 30 Native USB_OC6# +3VSUS GPD3 OD EXT_SCI# GPK2 GPI -
53 IO BOARD GPIO 31 Native USB_OC7# +3VSUS GPD4 OD EXT_SMI# GPK3 GPI -
54 PORT Docking*** GPIO 32 GPO - +3VS GPD5 GPO LCD_BACKOFF# GPK4 GPI -
55 Super I/O & FIR GPIO 33 GPO - +3VS GPD6 ALT FAN0_TACH GPK5 GPI -
56 LED GPIO 34 GPO - +3VS GPD7 GPI - GPL0 GPI APS_PWR_CNT#
57 DISCHARGE GPIO 35 GPO CLK_SATA_REQ# +3VS GPE0 GPO VSUS_ON GPL1 GPI APS_ST#
58 SMS GPIO 36 GPI - +3VS GPE1 GPO SUSC_EC# GPL2 GPO USB_PWR_EN#
60 DC power jack, Batter conn. GPIO 37 GPI PCB_ID0 +3VS GPE2 GPO SUSB_EC# GPL3 GPO -
61 Blue Tooth GPIO 38 GPI PCB_ID1 +3VS GPE3 GPO CPU_VRON GPL4 GPO -
62 TPM*** GPIO 39 GPI PCB_ID2 +3VS GPE4 ALT PWR_SW# GPL5 GPO AC_ID
65 MDC NUT & Hinksink NUT*** GPIO 40 Native USB_OC1# +3VSUS GPE5 ALT - GPL6 GPO AC_65W
66 E-SATA*** GPIO 41 Native USB_OC2# +3VSUS GPE6 GPI LID_SW# GPL7 GPO CHG_LOW_LED#
68 XDP*** GPIO 42 Native USB_OC3# +3VSUS GPE7 GPO MEDIA_KEY# GPK6 GPO -
4 4
80 POWER_VCORE GPIO 43 Native USB_OC4# +3VSUS GPF0 GPI - GPK7 GPI -
81 POWER_SYSTEM GPIO 44 Native USB_OC8# N/A GPF1 GPI NOVO_CARE#
82 POWER_I/O_1.8VS & VCCP GPIO 45 Native USB_OC9# N/A GPF2 ALT TP1_CLK
83 POWER_I/O_DDR & VTT GPIO 46 Native USB_OC10# N/A GPF3 ALT TP1_DAT
84 POWER_I/O_*** GPIO 47 Native USB_OC11# N/A GPF4 ALT TP_CLK
85 PWR_VGA_CORE & 1.1V GPIO 48 GPI - +3VS GPF5 ALT TP_DAT
87 POWER_SHUTDOWN# GPIO 49 GPO GPU_RST# +3VS GPF6 GPO THRO_CPU
88 POWER_CHARGER GPIO 50 Native PCI_REQ#1 +3VS GPF7 GPO SUSPEND_LED#
90 POWER_DETECT GPIO 51 Native - +3VS GPG0 GPI PM_THERM#_EC
91 POWER_LOAD SWITCH GPIO 52 Native PCI_REQ#2 +3VS GPG1 ALT PM_SUSB#
92 POWER_PROTECT GPIO 53 Native - +3VS GPG2 GPO BAT1_CNT2#
93 POWER_SIGNAL GPIO 54 Native PCI_REQ#3 +3VS - - -
5
94 POWER_FLOWCHART GPIO 55 Native - +3VS - - - 5
GPIO 56 GPI - +3VSUS
GPIO 57 GPI - +3VSUS
GPIO 58 GPI - +3VSUS Title : Schematic Information
GPIO 59 Native USB_OC0# +3VSUS Engineer: Tina Lee
Size Project Name Rev
GPIO 60 Native RTLAN_DSM_EN +3VSUS
Custom Rocky 40/50 1.0
Date: Wednesday, December 19, 2007 Sheet 2 of 94
A B C D E
5 4 3 2 1
H_D#[63:0]
10 H_D#[63:0]
+VCCP_CPU +VCCP_CPU 4,5
H_A#[35:3]
10 H_A#[35:3]
H_REQ#[4:0]
10 H_REQ#[4:0]
Reserved for the
T0318 S3 reboot issue.
T0319
D D
1
H_CPURST#
U0301A U0301B
1
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# 10 D[0]# D[32]#
1
ADDR GROUP 0
H_A#4 L5 E2 @ H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 10 D[1]# D[33]#
H_A#5 L4 G5 C0302 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 10 D[2]# D[34]#
H_A#6 K5 10PF/50V H_D#3 G22 V26 H_D#35
2
A[6]# D[3]# D[35]#
DATA GRP 0
DATA GRP 0
H_A#7 M3 H5 H_D#4 F23 V23 H_D#36
A[7]# DEFER# H_DEFER# 10 D[4]# D[36]#
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# 10 D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 10 D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
H_A#11 A[10]# +VCCP_CPU H_D#8 D[7]# D[39]# H_D#40
P5 A[11]# BR0# F1 H_BR0# 10 K24 D[8]# D[40]# Y25
DATA GRP 2
H_A#12 P2 H_D#9 G24 W22 H_D#41
A[12]# D[9]# D[41]#
CONTROL
H_A#13 L2 D20 H_IERR# R0309 1 2 56Ohm H_D#10 J24 Y23 H_D#42
H_A#14 A[13]# IERR# H_D#11 D[10]# D[42]# H_D#43
P4 A[14]# INIT# B3 H_INIT# 20 J23 D[11]# D[43]# W24
H_A#15 P1 H_D#12 H22 W25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# 10 F26 D[13]# D[45]# AA23
M1 1 T0352 H_D#14 K22 AA24 H_D#46
10 H_ADSTB#0 ADSTB[0]# D[14]# D[46]#
C1 H_D#15 H23 AB25 H_D#47
RESET# H_CPURST# 10 D[15]# D[47]#
H_REQ#0 K3 F3 J26 Y26
REQ[0]# RS[0]# H_RS#0 10 Place Series Resistor 10 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 10
H_REQ#1 H2 F4 H26 AA26
REQ[1]# RS[1]# H_RS#1 10 on H_CPURST# Without 10 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 10
H_REQ#2 K2 G3 H25 U22
REQ[2]# RS[2]# H_RS#2 10 Stub 10 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 10
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# 10
H_REQ#4 L1 REQ[4]# H_D#16 H_D#48
HIT# G6 H_HIT# 10 N22 D[16]# D[48]# AE24
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# 10 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# T0330 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 1 R23 D[19]# D[51]# AB22
ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1 H_D#20 L23 AB21 H_D#52
A[20]# BPM[1]# D[20]# D[52]#
DATA GRP 1
C H_A#21 U4 AD1 1 T0331 H_D#21 M24 AC26 H_D#53 C
A[21]# BPM[2]# D[21]# D[53]#
XDP/ITP SIGNALS
H_A#22 Y5 AC4 1 T0332 H_D#22 L22 AD20 H_D#54
H_A#23 A[22]# BPM[3]# T0333 H_D#23 D[22]# D[54]# H_D#55
U1 A[23]# PRDY# AC2 1 M23 D[23]# D[55]# AE22
H_A#24 R4 AC1 H_PREQ# H_D#24 P25 AF23 H_D#56
H_A#25 A[24]# PREQ# H_TCK H_D#25 D[24]# D[56]# H_D#57
T5 A[25]# TCK AC5 P23 D[25]# D[57]# AC25
H_A#26 T3 AA6 H_TDI H_D#26 P22 AE21 H_D#58
DATA GRP 3
H_A#27 A[26]# TDI H_TDO +VCCP_CPU H_D#27 D[26]# D[58]# H_D#59
W2 A[27]# TDO AB3 T24 D[27]# D[59]# AD21
H_A#28 W5 AB5 H_TMS H_D#28 R24 AC22 H_D#60
H_A#29 A[28]# TMS H_TRST# H_D#29 D[28]# D[60]# H_D#61
Y4 A[29]# TRST# AB6 L25 D[29]# D[61]# AD23
2
H_A#30 U2 C20 H_DBR# H_D#30 T25 AF22 H_D#62 Comp0,2 connect with Zo=27.4 ohm,
H_A#31 A[30]# DBR# R0315 H_D#31 D[30]# D[62]# H_D#63 make trace length shorter than 0.5".
V4 A[31]# N25 D[31]# D[63]# AC23
H_A#32 W3 1KOhm L26 AE25 Comp 1,3 connect with Z0=55 ohm,
A[32]# 10 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 10
H_A#33 AA4 THERMAL 1% M26 AF24 make trace length shorter than 0.5".
A[33]# To Thermal 10 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 10
H_A#34 AB2 N24 AC20
10 H_DINV#1 H_DINV#3 10
1
H_A#35 A[34]# sensor page DINV[1]# DINV[3]#
AA3 A[35]# PROCHOT# D21 H_PROCHOT_S#
V1 A24 GTL_REF AD26 R26 H_COMP0 R0311 1 2 27.4Ohm 1%
10 H_ADSTB#1 ADSTB[1]# THRMDA CPU_THRM_DA 50 GTLREF COMP[0]
T0320 1 B25 R0317 2 @ 1% 1 1KOhm C23 MISC U26 H_COMP1 R0312 1 2 54.9Ohm 1%
THRMDC CPU_THRM_DC 50 TEST1 COMP[1]
2
A6 R0318 2 @ 1% 1 1KOhm D25 AA1 H_COMP2 R0313 1 2 27.4Ohm 1%
20 H_A20M# A20M# TEST2 COMP[2]
1
ICH
A5 C7 R0316 T0304 1 C24 Y1 H_COMP3 R0314 1 2 54.9Ohm 1%
20 H_FERR# FERR# THERMTRIP# H_THRMTRIP# 5,11,20,31 TEST3 COMP[3]
C4 C0301 2KOhm T0305 1 AF26
20 H_IGNNE# IGNNE# T0302 TEST4
T0321 1 0.1UF/10V 1% T0306 1 AF1 E5 H_DPRSTP# 11,20,80
2
@ T0307 TEST5 DPRSTP#
20 H_STPCLK# D5 1 A26 B5 H_DPSLP# 20
1
STPCLK# TEST6 DPSLP#
20 H_INTR C6 H CLK D24 H_DPWR# 10
1
LINT0 DPWR#
20 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 29 29 CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 20
20 H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# 29 29 CPU_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 10
29 CPU_BSEL2 C21 BSEL[2] PSI# AE6 PM_PSI# 80
1
T0308 1 M4
T0309 RSVD1 Zo=55 ohm, 0.5" max SOCKET478BR
1 N5 RSVD2
T0310 1 T2 for GTLREF Place Series Resistor
B RSVD3 T0303 on H_PWRGD Without Stub B
T0311 1 V3 RSVD4 TPC26T
RESERVED
T0312 1 B2 BCLK FSB BSEL2 BSEL1 BSEL0
T0313 RSVD5
1 C3 RSVD6
T0314 1 D2 166 667 L H H
T0315 RSVD7 +VCCP_CPU
1 D22 RSVD8
T0316 1 D3 200 800 L H L R0319 2 1 200Ohm @
T0317 RSVD9
1 F6 RSVD10
266 1067 L L L
SOCKET478BR
+VCCP_CPU
2
Default Strapping When Not Used
R0310
+VCCP_CPU
68Ohm
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